Computers, Materials & Continua DOI:10.32604/cmc.2021.016133
Article

A Compact Dual-Port Multi-Band Rectifier Circuit for RF Energy Harvesting

Surajo Muhammad1,*, Jun Jiat Tiang1, Sew Kin Wong1, Amjad Iqbal1, Amor Smida2 and Mohamed Karim Azizi3

1Centre for Wireless Technology, Faculty of Engineering, Multimedia University, Cyberjaya, 63100, Malaysia
2Department of Medical Equipment Technology, College of Applied Medical Sciences, Majmaah University, AlMajmaah, 11952, Saudi Arabia
3Department of Physics, Microwave Electronics Research Laboratory, Faculty of Mathematical, Physical and Natural Sciences of Tunis, Tunis El Manar University, Tunis, 2092, Tunisia
*Corresponding Author: Surajo Muhammad. Email: doguwa_2002@yahoo.com
Received: 24 December 2020; Accepted: 24 January 2021

Abstract: This paper presents a compact multi-band rectifier with an improved impedance matching bandwidth. It uses a combination of Π–matching network (MN) at Port-1, with a parallel connection of three cell branch MN at Port-2. The proposed impedance matching network (IMN) is adopted to reduce circuit complexity, to improve circuit performance, and power conversion efficiency (PCE) of the rectifier at low input power. The fabricated rectifier prototype operates at 0.92, 1.82, 2.1, 2.46 and 2.65 GHz covering GSM/900, GSM/1800, UMTS2100, and Wi-Fi/2.45–LTE2600. The size of the compact rectifier on the PCB board is 0.13λg × 0.1λg. The fabricated rectifier achieved an RF-to DC (radio frequency direct current) PCE of 31.8%, 24%, 22.7%, and 15%, and 14.1% for −20 dBm at the five respective measured operating frequencies. The circuit attains a peak RF-to-DC PCE of 82.3% for an input power of 3 dBm at 0.92 GHz. The proposed rectifier realizes an ambient output dc voltage of 454 mV for multi-tone input signals from the two ports. The rectifier drives a bq25504-674 power management module (PMM) to achieve 1.21 V from the two-port connection. The rectifier has the ability to exploit both frequency domain through the multi-band operation with good impedance bandwidth and a spatial domain using dual-port configuration. Hence, it is a potential candidate for various applications in radio frequency energy harvesting (RFEH) system.

Keywords: RF energy harvesting; impedance matching network; power conversion efficiency; multi-band rectifier; dual-port; power management module

1  Introduction

The technological advancement and widespread in wireless communication have increased the need for low-powered internet of things (IoT) devices, and sensor nodes [1,2]. These devices are usually operated by batteries, and it is undesirable to provide a significant number of nodes with batteries because of their maintenance cost for charging or replacement. The abundance of electromagnetic (EM) power sources radiated into space from various wireless equipment appears to be a promising source of energy through RFEH technique [1–3]. RFEH has become an emerging technology for handling low powered electronic devices through the process of battery-less (direct power) and wireless charging for driving other wireless node [2,4]. The RFEH module comprises a rectifying antenna (rectenna), with two segments, namely an antenna and a rectifying circuit. The rectifying circuit is the significant part of the RFEH node comprising an IMN, a rectifying diode, a dc-pass filter, and a terminal load [2]. RFEH system offers several advantages over other forms of energy harvesting (EH) method. In fact, it has lightweight, flexibility for movement, continuous supply, and independent of light. Moreover, it is integrable and scalable with other nodes with less environmental influence [1,4].

Over the years, various research works on rectenna and rectifier circuits have been proposed for single-band [2,3], dual-band [5], and multi-band operations [6,7]. The widely deployed frequency bands for the RFEH system include GSM/900, GSM/1800, UMTS/2100, Wi-Fi/2.45, and LTE/2600 because of their significant contributions for the RF available power extracted by the RFEH node. The independent and autonomous attributes associated with the IoT devices, and sensor nodes, makes the deployment of a single frequency source RF harvester ineffective [6,8]. Because of the random and unpredictable nature of the received RF signal, and any form of signal distortion on the specified frequency creates energy losses that can lead to a node or device failure [8]. Using multi-band RF rectifier circuits provide a significant improvement over the single-band and dual-band operation because of the energy contributions from each frequency tone [9]. Most of the reported designs in [10,11] are associated with narrow operational bandwidth. Hence, the RF harvester performance is greatly affected when the operating frequency shifts because of components loss, parasitic capacitance, and signal propagation. Using an efficient rectifier with wideband characteristics is considered being a promising approach for a reliable RFEH system [11,12]. The RF spectral survey from the open literature in [10–13] shows that designing a broadband rectifier with the ability to collects much of the available RF energy across the EM spectrum is a potential candidates to achieve a sustainable power source [14].

Minimal available RF power density, impedance mismatch, non-linear resistance of a diode, a variation of the circuit performance with the operating frequency, and a terminal load are some of the major challenges in rectifier design [1]. These challenges have been addressed over the past few years from several literature studies [1–15]. The authors in [1] reported an RFEH circuit with the manually adjustable MN using trimmers with 4-stage voltage multiplier operating at 0.7, 0.85, and 0.9 GHz. The design achieved a peak PCE of 41%, 40%, and 42% for 0 dBm at the three variable frequencies, respectively. The design approach is impractical because of the maintenance cost to manually match the antenna with rectifying circuits in the current trends of RFEH module applications involving large sensor networks and IoT devices. In [9], the authors presented a triple-band (1.84, 2.14, and 2.45 GHz) RF harvester with a maximum efficiency achieved at 25.3%, 27.9%, and 19.3% for −20 dBm, respectively, using a complex 16 ports antenna connected to 8 individual rectifiers. In [10], the authors proposed a triple-band rectifier operating at 0.85, 1.77, and 2.07 GHz using an impedance matching transformer, and the rectifier achieved a maximum PCE of 61.9%, 71.5%, and 60.5% for 0 dBm input power, respectively. The authors in [16] presented a triple-band RF harvester operating at 2 2.5, and 3.5 GHz, and the design achieved a maximum PCE of 53%, 31%, and 15.56% at −7 dBm input power, respectively. The designed frequency at 2 GHz and 3.5 GHz is associated with minimal power density for extraction by the RFEH node. A multiband RFEH module is considered to be a suitable candidate for achieving a robust RFEH module, with a reliable power source, because of the available power density contributed by each frequency tone [9]. The authors in [17] reported a four-band (0.89, 1.27, 2.02, and 2.38 GHz) rectifier using a series diode D1, and a shunt combination of field-effect transistor (FET) with another diode D2. The design recorded an RF-to-DC PCE of 47.8%, 33.5%, 49.7%, and 36.2%, at each respective frequency for −10 dBm input power. The authors in [18] present a quad-band (0.95, 1.83, 2.45, and 2.62 GHz) rectifier, using a pair branch of 4-stage voltage multiplier. The rectifier attained maximum RF-to-DC PCE of 44.8%, 27.5%, 28%, and 24.2% for 10 dBm input power, respectively. The additional parasitic capacitance from FET in [17], and multiple components in [18] degrade the rectifier performance. The designed frequency by the authors in [16] at 2 and 3.5 GHz, and [17] at 1.27 GHz is associated with minimal power density for extraction by the RFEH node. The authors in [19] also proposed a quad-band (1.3, 1.7, 2.4, and 3.6 GHz) rectifier through a T-section distributed MN, and the work realized a peak PCE of 54% at 1.7 GHz for 10 dBm. The proposed design is suitable for the high power RFEH module, and the reduced circuit performance is largely attributed to parasitic capacitance across the rectifier junction besides harnessing minimal available RF power density at (1.3 and 3.6 GHz). To improved RF-to-DC PCE, the authors in [9,20] exploits the potential of a spatial domain through multi-port/multiple antennas, and a dc combining from multiple rectifiers outputs for transforming the intercepted EM signal into usable dc outputs. The authors in [20] proposed a quad-band (98 MHz, 0.88, 1.7 and 2.370 GHz) rectenna using two independent circuits to harvest RF signal through dc combining. The low-frequency rectifier harvest frequency modulated (FM) signals efficiently at the line of sight (LOS) with a narrow operational bandwidth of 10 MHz, and achieved a peak RF-to-DC PCE of 80% for −6 dBm with a total size of (35 mm × 25 mm). Conversely, the triple-band rectifier of size (70 mm × 75 mm) achieved a maximum efficiency of 77%, 74%, and 54% for −6 dBm, respectively. The design does not well exploit the frequency domain of the EM spectrum because of the rectifier’s narrow bandwidth and large electrical size. The two-level dc combiner also increases the harvester transmission line losses. The authors in [21] presented a wideband rectifier that operates between (1.8–2.5 GHz). The rectifier achieved 55% RF-to-DC PCE for an input power of −10 dBm. The authors in [15] presented a six-band (0.55, 0.75, 0.9 GHz, 1.85, 2.15, and 2.45 GHz) that achieves a maximum PCE of 67% for an input power of −5 dBm. The −10 dB operational bandwidth reported in the design is relatively narrow across the six operating frequencies. Using single dual-diode increases the rectifier parasitics capacitance at the junction of the diode. The sixth-order lumped elements MN from the three cell branches also lowers the overall RF-to-dc PCE of the circuit because of parasitics. It is worth noting that the majority of the reported works on the RFEH system from the literature for triple-band and multi-band operations are designed with a narrow operational bandwidth between (20–40 MHz). Some of the proposed designs operate with frequencies that have little or no contributions from the overall harvested energy, besides operating at high input power.

This paper proposes a compact dual-port rectifier that covers (GSM/900, GSM/1800, UMTS/2100, Wi-Fi/2.45, and LTE/2600) in the EM spectrum, matched with a 2 kΩ terminal load. The work provides a further study of the rectifier architecture and the operational procedure for a reliable RFEH module. The proposed design shows a significant improvement regarding operational bandwidth, compactness, operational power sweep, and the overall PCE. The contributions of this research work includes:

•      The work presents, to the best of our knowledge, a compact and efficient multi-band rectifier as compared to the state-of-the-art rectifiers.

•      The synchronous harvesting of RF signal for optimal and sustainable RFEH module by exploiting spatial and frequency domain.

•      We present a unique IMN in the upper frequencies using a combination of a meandered line (MDL), a shunt radial stubs, a shunt-curve impedance transformer with a series inductor to enhance the rectifier efficiency with a minimum junction capacitance across the rectifier branch.

•      Enhanced rectifier bandwidth to cover most of the significant spectrum in the RFEH system design for optimal and reliable extraction of ambient RF input signal from the multiple signal tones. This is guided by the RF spectral survey carried out in this work and the open literature.

This paper is organized as follows. Section 2 presents design architecture of the multi-band rectifiers. Section 3 outlines the structure, specifications, and the circuit layout of the RFEH rectifier. Section 4 provides results discussion, indoor and outdoor performance analysis of the proposed rectifier. Section 5 concludes the paper.

2  Design Architecture

The prime objective of the RFEH system is to transform the received RF signals from the ambient sources into a usable dc power source with minimal losses [1,4,10]. The performance of the RF harvester (single-band or multiband) is considerably reduced when the operating frequency shifted from the optimal design level. Multiple RFEH circuits have been studied and proposed in the literature [1–3,8,14–20]. The use of uniform antenna arrays and a multi-port antenna are deployed in rectenna circuits to handle spatial domain for enhancing the received RF signals from the ambient environment. The overall dc output signal is realized through RF combination of the antenna outputs or combining the dc outputs from multiple rectifiers [9]. Fig. 1a presents an RFEH architecture that collects the received RF power from a set of uniform gain antennas or a single antenna array, which is then delivered to the rectifier through BALUN. The approach needs a rectifying diode with a large breakdown voltage to accommodate more power at the expense of a large parasitic capacitance across the rectifier junction, which degrades the overall RF-to-dc PCE [20]. Uniform antenna arrays are normally associated with large elements spacing to address mutual coupling, resulting in a large antenna electrical size [9]. For example, the work in [5] proposed a dual-band (1.8 and 2.5 GHz) rectenna using an antenna array of size 264 mm × 109.5 mm, and a rectifier with a 7-stage voltage multiplier of size 70.5 mm × 46 mm having an overall RF-to-dc PCE of 24% for −20 dBm. Fig. 1b shows an RFEH circuit topology from a set of multiple or array of power harvesting circuits (comprising a receiving antenna, an IMN, and a rectifying diode). The overall output dc voltages of the power harvester are added through a dc combiner. As such, a rectifier with a narrow bandwidth is subject to impedance mismatched, which decreases the performance of the RFEH system. A hybrid configuration containing the idea of design architecture from Figs. 1a, and 1b is proposed in Fig. 1c. The topology comprises an array of power harvesting circuits linked to a single band rectifier via dc combiner.

The proposed design architecture in Fig. 1c is applied in this work because of the rectifier ability to exploit both spatial and frequency domains using RF and dc combinations. The architecture exploits the spatial domain through dual-port configuration with the ability to receive RF signal from the ambient environment, and the frequency domain is exploited through multiple operating frequencies with a good operational bandwidth to cover a wide frequency spectrum for a reliable RFEH node. The idea is to deploy a narrow band rectifier tuned around 900 MHz using lumped MN in the first segment (Rectifier-1). The second section of the rectifier (Rectifier-2) covers a wider operating frequency between (1.7 to 2.7 GHz) through a combination of distributed and lumped MN. The overall energy transformed by the power harvesting circuits is integrated by the dc combiner, which can be utilized by a practical load such as a low-powered dc/dc converter and sensor node. The design approach ensures less circuit complexity from each rectifier block for efficient RF harvester.

Figure 1: RFEH design architecture: (a) With RF-combined antennas, and a single multi-band rectifier, (b) with individual rectifying antennas integrated through a dc combiner, (c) proposed hybrid topology

3  Rectifier Design

The deployment of high frequency (HF) rectifying diode for low-power applications in the RFEH system requires reliability and the capability of the circuit to manage energy conversion with a minimum dissipation [22]. The RF-to-DC PCE of a rectifying antenna primarily depends on a rectifying circuit [21]. Rectifier topology can be configured in different types of the circuit layout. Single series diode and voltage multiplier are the two widely used topologies. A voltage multiplier can be modeled and cascaded as Dickson/Greinacher or Villard/Cockcroft–Walton rectifier, and are mostly considered for a high powered RFEH circuits [4,20]. Single series diode configuration demonstrates higher RF-to-DC PCE at low input power levels because of low junction capacitance and a faster switching time [4–10]. Hence, the proposed rectifier is designed based on a single series diode alongside a shunt DC-pass capacitor filter with the terminal load, as depicted in Fig. 2.

Figure 2: Conventional single series rectifier topology for RFEH circuit

Fig. 3 presents a schematic of the proposed multi-band rectifier using a dual-port configuration. The matching from each port is designed using a unique IMN approach to reduce circuit complexity and achieved compactness. The first segment of the rectifier (Rectifier-1) is achieved using a simple Π-MN (third-order lumped elements) to cover the first frequency at 0.94 GHz and harvest RF signals for the GSM/900 spectrum band. Π-MN is adopted for more degree of freedom with an improved matching against L-section MN [12]. The second segment of the integrated rectifier (Rectifier-2) is built around an impedance transformer network comprising three cell branches, each of the cell branch is matched to a single series diode at (1.8, 2.1, and 2.45 GHz) to achieved a multi-band operation.

Figure 3: Proposed EM model layout of the rectifier

The proposed rectifier segments are designed using a single series HSMS-2850 Schottky barrier diode from Avago having a SOT-23 physical layout. The diode is a fast switching device suitable for low-powered RF applications, with the ability to operate at high frequency, with a minimum junction capacitance, and a low forward-biased voltage of 0.18 pF, and 150 mV, respectively [2,10]. Eq. (1) Describes a relationship for the junction capacitance driven by an operating frequency fc, and input voltage Vin over a period of time t. A DC-pass filter and a terminal load are the remaining parts of the rectifier, which are designed and constructed on a 1.575 mm thick RT/Duroid 5880 substrate, (with a dielectric constant of 2.2, and a minimum loss tangent of 0.0009). The rectifier is connected to a 50 Ω source through a transmission line across the two-port (Port-1 and Port-2) terminal, respectively.

C=I.dtdV(1)

where C is the capacitance of the capacitor with current I passing through junction diode at the rate of nonlinear voltage “V”.

Each segment of the rectifier undergoes a preliminary design in advance design system (ADS) without a MN, having only a rectifying diode, dc-pass capacitor filter, and a terminal load. The dc-pass filter is designed to prevent the entrance of higher-order harmonics into the terminal load [21]. The load terminal RL is primarily a frequency-dependent and complex in nature [9]. A source pool simulation is conducted to evaluate the appropriate value of the load terminal in ADS using a harmonic balance solver, and a 2 kΩ load provides an average trade-off across the five operating frequencies. A 220 pF capacitor filter is shunted with a load terminal to smoothen the peaks from the diode outputs.

Fig. 4a presents a simplified simulation setup to compute the values of the diode input impedance (Zin = Rin + jXin) from each cell block. For this study, a power level of −10 dBm is considered because the average input power between the conventional transceiver is within −10 dBm reference point, taking RF link loss into account [11–13,17]. The values of Zin at the four (0.94, 1.8, 2.1, 2.45 GHz) operating frequencies are (169.90 – j644.6, 59.84 – j340.21, 46.30 – j288.15, 37.82 – j242.12). The rectifier input impedances are then matched to 50 Ω transmission line from the input port of the antenna.

Figure 4: (a) Input impedance simulation setup for operating frequency fc (b) impedance matching and the rectifier input impedance equivalent circuits

The input signal from Port-1 at 50 Ω is matched to the input impedance of the rectifier through Π-MN comprising (L1, L2, and C1) with three degrees of freedom. The RFEH receiving antenna at Port-1 is modeled as a single-tone signal generator, operating at 0.94 GHz and 50 Ω output impedance in ADS. Fig. 4b provides an equivalent circuit model of Rectifier-1 seen from the rectifying diode.

By splitting the impedance X2 for the inductor L2 into two portions (X2a, and X2b) such that L2=L2a+L2b, and X2 = X2a +X2b. The Π-MN becomes two L-sections MN connected back to back. The first portion (Portion-1) of the network comprises a series inductor Lb, with a shunt capacitor C1 of susceptance B2. The second portion (Portion-2) contains a shunt inductor L1 of susceptance B1 and a series inductor La, respectively. A virtual source resistance (Rv) is added into the network. Rv is choosing arbitrarily such that it is lower than either source impedance Rant and the rectifier input impedance Rin.

Looking into Portion-1, the quality factor Q1 is given by:

Q=1RvGin-1(2)

where conductance Gin = 1/Rin.

The elements of the matching section X2b and B1 are determined by canceling the imaginary part of the impedance and equating the real part at the operating frequency.

X2b=Rv(1RvGin-1) (3)

B1=Gin(1RvGin-1)-Bin (4)

L2b, and C1 are calculated as:

L2b=Rvωo(RinRv-1) (5)

C1=1ωoRin(RinRv-1)-Cin (6)

where Bin = ωoCin, is the equivalent input susceptance of the proposed rectifier, and ωo is the angular operating frequency.

Looking into Portion-2 of the matching section, the quality factor Q2 is given by:

Q2=(RantRv-1)(7)

The elements of the matching section B2 and X2b are determined by:

B2=1Rant(RantRv-1) (8)

X2a=Rv(RantRv-1)-Rin (9)

L1, and L2a are also calculated as:

C1=Rantωo(RantRv-1) (10)

L2a=Rvωo(RantRv-1)-Rinωo (11)

L2 is computed by adding Eqs. (5) and (11) as:

L2=Rvωo(RantRv-1+RinRv-1)-Rinωo(12)

The overall quality factor Q of the network is the summation of the two quality factors Q1, and Q2 (Q = Q1+Q2).

The parameters of the Π-section MN (L1, L2, and C1) were initially computed at (6.9 nH, 15.35 nH, and 2.46 pF) using Zin = 169.90–j644.6, with Rv choosing to be 20 Ω. The parameters were transferred into ADS through the ideal components palette. To compensate for the effects of the transmission line in the circuits, the elements of the MN were then tuned toward (8.6 nH, 18 nH, and 1 pF), respectively. A further optimization process was conducted, and the ideal lumped elements were replaced with an equivalent component palette from muRata in the ADS library. The optimized parameters were achieved at (8.2 nH, 22 nH, and 0.5 pF), respectively. L1 and L2 belong to the LQP03TG-0603 layout components series with part number (LQP03TG24NH02), and C1 is under the GRM18-0402 series with part number of GRM1885C1H221JA01.

The input impedance of the diode is frequency-dependent with a narrow bandwidth for a conventional MN [6]. The proximity of the GSM/1800, UMTS/2100, and Wi-Fi/2.45 frequency bands in the EM spectrum make a rectifier design with a reliable input impedance bandwidth across those bands a quite challenging task [9]. The approach of integrating two or more single band rectifiers in parallel to cover a wide range of frequencies with good impedance bandwidth is reported in [7–15,21]. This is a key to ensure maximum power transfer to the terminal load with a reliable contribution from each signal tone. Consequently, the second rectifier segment (Rectifier-2) is designed based on the aforementioned approach, comprising three cell blocks (Cell-1, Cell-2, and Cell-3) connected in parallel through Port-2.

Table 1: Dimensions and parameters of the proposed rectifier

A single band MN operating at 1.8, 2.1, and 2.45 GHz is initially designed to match a single series diode to 50 Ω transmission line, using a curve-shunt stub impedance transformer at the three cell blocks, respectively. The shunt stub length is first computed to be (16.6 mm, 14.23 mm, and 12.20 mm) at λ/8 for each respective cell block. To ensure the necessary cancellation of susceptance across the cell branches, the equivalent shunt stub length is transferred into ADS through a combination of microstrip curve bend (MCURVE) and a microstrip line (MLINE) connected to each diode in the cells. The distance of each curve-shunt stub is tuned to match the input impedance of the transmission line at 50 Ω to the conjugate of the rectifier input impedance seen from the diode. These provides appropriate cancellation of susceptance across each cell branch. A lumped components from (muRata, and Coilcraft) are loaded into the MN of (Cell-1, Cell-2, and Cell-3) to reduce the transmission lines length, minimizes transmission line losses, and enhances the input signal to the rectifying diode. Additionally, An MDL alongside shunt radial stub is integrated into the MN of each cell. The role of the two additional elements is to manage the rectifier performance with an extra degree of freedom, offers a broader operating frequency, and compactness. Microstrip lines (TL7, TL8, TL14, and TL21) are further added into the cell blocks to sustain a practical rectifier. Integrating the aforementioned attributes into the MN of Rectifier-2 causes further parametric tuning to achieve the design goal. Cell-1 and Cell-2 are tuned and optimized at 1.81 and 2.1 GHz using 8.7 nH inductor from muRata with LQW15AN-0603 series layout with part number (LQW15AN8N7G00), and the two cells are directly connected to the load terminal RL via a dc-pass filter C3. Similarly, Cell-3 has been tailored to accommodate an additional 2.6 GHz operating frequency for LTE/2600, and the cell is optimized through a 4.3 nH inductor from Coilcraft having a 0603HP series layout with a part number of (4N3XGLU). A shunt capacitor C2 is also connected to the cathode of diode D4 to limit the interference among the neighboring cells operating close to each other. The curve-shunt stub impedance transformers are coupled to the ground through Vias to deliver dc to the rectifier circuits. The RFEH receiving antenna at Port-2 is modeled as a four-tone signal generator, operating at 1.81, 2.1, 2.43, and 2.6 GHz and 50 Ω output impedance in ADS.

The corresponding output dc signals from the two ports are connected to the load terminal RL by a simple dc combiner. The overall rectifier circuit is achieved from a combination of five (5) inductors, three (3) capacitors, four (4) diodes, and a load terminal RL.

The whole designed rectifier undergoes fine-tuning and optimization to minimize the effects of additional parasitics (such as SMA source connector, interconnecting transmission lines, soldering, and chip component tolerance losses) that are not considered in the simulation. Tab. 1 presents the optimized parameters of the proposed multi-band rectifier.

4  Results and Discussion

Fig. 5a presents the fabricated rectifier prototype using full ground architecture. A pair of crocodile clip connects the rectifier across the terminal load to evaluate the output performance. The rectifier occupies a space of 29.9 mm × 22.9 mm on the PCB circuit board. The measurements of the input reflection coefficient (S11) of the proposed rectifier is conducted through a vector network analyzer (VNA) E5062A from Agilent Technologies. Fig. 5b shows a good agreement between the measured and simulated S11, at −10 dB reference point, the simulated S11 is realized at (0.94 GHz for Rectifier-1, and 1.81, 2.1, 2.43, and 2.6 GHz for Rectifier-2). Similarly, Rectifier-1 achieved measured S11 at 0.92 GHz (0.9–0.96 GHz), and Rectifier-2 attained measured S11 at 1.82 GHz (1.78–1.86 GHz), 2.1 GHz (2.06–2.14 GHz), 2.46 GHz/2.65 GHz (2.39–2.7 GHz). The results demonstrate a good impedance bandwidth and the rectifier ability to extract energy from GSM/900, GSM/1800, UMTS/2100, Wi-Fi/2.45, and LTE/2600 frequency bands. The slight shift in the measured results is possibly attributed to the parasitics in the lumped elements, rectifying diode, and SMA components deployed in the rectifier. The isolation between the two ports in the proposed design is determined by S12 at Port-1. The measured values of S12 are (58.7, 37.41, 53.93, 68.71 and 55.34 dB) at (0.92, 1.82, 2.1, 2.46, and 2.65 GHz), respectively.

Figure 5: (a) Fabricated prototype of the proposed rectifier. (b) Simulated and measured reflection coefficient S11 against frequency for the proposed multi-band rectifier at Port-1, and Port-2

Fig. 6 presents the measured and simulated RF-to-dc PCE of the proposed rectifier. The measured result is realized through frequency sweeping between 0.8 to 2.8 GHz for 0 dBm, −10, −20, and −30 dBm input power levels across the 2 kΩ load terminal. The rectifier frequency sweeping is conducted individually from each port of Rectifier-1 and Rectifier-2. When a single port is measured the other port is loaded with a 50 Ω terminal for the entire measurement process. A large signal S-parameter (LSSP) and HB simulations that coexists are applied to evaluate the rectifier performance parameters through parameter sweep in ADS. The RF-to-dc PCE measurement is accomplished by connecting the rectifier to a 12 GHz APSIN12G signal generator from AnaPico through a 50 Ω coaxial probe to generate low power signals at a given operating frequency, and the power is varied from −30 dBm to 5 dBm for the five operating frequencies. During the entire measurement process, the output dc voltage across the 2 kΩ terminal load is recorded for each sample point using a digital multi-meter, and the measurements at Port-1 and Port-2 were conducted separately.

Figure 6: Simulated and measured RF-to-dc PCE sweep against frequency at different RF input power levels Pin summed from Port-1and Port-2

The RF-to-dc PCE of the rectifier at each port is computed from the measured output dc voltage as:

ηPCE%=PdcPin×100%=(Vdc2RLPin)×100%(13)

where ηPCE gives the RF-to-DC PCE, and Pdc is the output dc power across the load terminal (RL). Pin represents the input power from the source antenna to the rectifier for each port.

The overall RF-to-DC PCE of the rectifier from the two ports is obtained from:

ηmax%=Pdc(Pin1+Pin2)×100%=[(Vdc1+Vdc2)2RL]×[1Pin1+Pin2]×100%(14)

where ηmax denotes the overall PCE from the two ports. Pin1 and Pin2 represent the input power to the rectifier at Port-1, and Port-2. Pdc is the dc output power across the load terminal RL. Vdc1 and Vdc2 shows the output dc voltages from Port-1, and Port-2, respectively.

Figs. 7a and 7b shows the simulated and measured RF-to-dc PCE of the proposed multi-band rectifier against the available RF power source. The rectifier achieved measured peak RF-to-DC PCE of 82.3% for 3 dBm at 0.92 GHz, and 72.4%, 74.5%, 73.9%, and 67.7% for 4, 0, 1 and −1 dBm at 1.82 GHz, 2.1 GHz, 2.46 GHz, and 2.65 GHz, respectively. To demonstrate the rectifier capability under low power condition, it can also be shown that the fabricated prototype realizes a maximum RF-to-DC PCE of 31.8%, 24%, 22.7%, 15%, and 14.1% for −20 dBm at the five operating frequencies, respectively. The RF-to-DC PCE at the upper frequency slightly drops mainly because of the losses associated with diodes and PCB at higher operating frequencies [15].

Figure 7: Simulated and measured RF-to-dc PCE against input power Pin at: (a) 0.92, 1.82 and 2.1 GHz (b) 2.46 and 2.65 GHz

Fig. 8 provides the measurement setups of the proposed rectifier. The measurement of the S11 and the output dc voltage were taken separately for each rectifier at Port-1 and Port-2, as previously discussed in this section.

Figure 8: Multi-band rectifier fabricated prototype and measurement setups for Port-1 and Port-2

Fig. 9 shows the RF-to-DC PCE performance of the multiband rectifier sweep against load terminal RL for 0 dBm input source. The proposed rectifier attained a maximum RF-to-dc PCE between the range of 1.2 kΩ–2.5 kΩ load terminal, and a 2 kΩ load is selected as an appropriate trade-off value for maximum dc output signal at a given operating frequency.

Figure 9: Multi-band rectifier RF-to-DC PCE against terminal load RL for 0 dBm

The measurement of the rectifier performance in ambiance environment is conducted in Multimedia University, Cyberjaya Campus. The distance and height between the testing site and the nearby cell tower (BS) are approximately 175 and 2 m, respectively. The first ambient test setup is carried out using two pairs of commercial whip antenna from ABRACON with a serial number (AEACAD097015-S698), and the antenna operates between (700 to 2700 MHz) with a 5 dBi gain. The efficiency of the antenna within the operating frequencies range is between 65%–58%, respectively. Fig. 10a presents the measurement setup for Rectifier-1 at Port-1, and Rectifier-2 at Port-2, using a single whip antenna, and a pair of the whip antenna is also connected at Port-1 and Port-2, respectively. The RF power densities is also measured during the ambient evaluation, through a 6 GHz RF spectrum analyzer from Aim (TTi PSA6005). The received power recorded around GSM/900, GSM/1800, UMTS/2100, Wi-Fi/2.45, and LTE/2600 by the spectrum analyzer varies between (−37 to −18 dBm, −35 to −15 dBm, −45 to −20 dBm, −50 to −20 dBm, and −45 to −20 dBm), respectively. From the reported RF power densities, the multi-band rectifier records an output dc voltage of 86.5, 398, and 454 mV for a single port connection at Port-1 and Port-2, and from a combination of the two ports, respectively.

Figure 10: Proposed rectifier ambiance measurement setups: (a) Ambiance only with bq25504-674 (b) Ambiance with bq25504-674

The second phase of the measurement is carried by introducing a PMM into the output of the rectifier. The ambient RF input signal generated by the antenna can be characterized as a multi-tone signal source, with variable levels of power that fluctuate over the range of design frequency. Additionally, the output impedance of the rectifier is a time-varying signal that requires a system with effective power buffering such as supercapacitor and micro-batteries through PMM to maintain a stable circuit operation [4,23]. A low power PMM bq25504-674 evaluation module (EVM) from Texas Instruments is deployed in this work. The module runs a programmable maximum power point tracking (MPPT) sampling network for optimal power transfer into the circuit. The module can detect a low startup input voltage of 130 mV for a cold-start, and 330 mV for a hot-start at a minimal quiescent current of 330 nA. The minimum cold-start input power required for the module to start a normal charging is −30 dBm. The bq25504 module is integrated with a boost dc–dc converter that can generate up to 3.1 V practical voltage levels. The EVM is also incorporated with a built-in battery management module that is deployed to manage the output power duty cycle to the load [23].

Fig. 10b shows the rectifier ambient measurements setup with the bq25504-674 EVM, and the proposed design setup achieved an output dc voltage of 351 mV for Port-1, 0.851 V for Port-2, and 1.214 V from the two-port connections.

Tab. 2 provides a comparison of the proposed multiband dual-port rectifier with other related works reported in the literature. The manual configuration of the MN reported by the authors in [1] is impractical. As seen in [10], the rectifier operational bandwidth is relatively narrow. The RF-to-dc PCE reported in [1,10] for an input power of 0 dBm across the designed operating frequencies is lower than that of the proposed design besides large electrical length. Our proposed work achieved 80.5%, 64%, 74.5%, 73.9%, and 62.4% measured RF-to-dc PCE for 0 dBm at the five operating frequencies, respectively. Although the authors in [9] reported an improved RF-to-DC PCE for −20 dBm at three operating frequencies. Our proposed work offers a better operational bandwidth across five operating frequencies. The designed frequency by the authors in [17] at 1.27 GHz and [19] at 3.6 GHz has a low power density for extraction. Additionally, the proposed designs achieved peak RF-to-DC PCE at 10 dBm, which is suitable for high-power RFEH system. It can be pointed out that our proposed design exhibits better compactness and an improved RF-to-DC PCE as compares to the work reported by the authors in [16,17,19]. A single-band rectifier reported by the authors in [20] at 98 MHz requires a direct LOS to operate. The wideband rectifier reported by the authors in [21] can only harvest RF signals at GSM/1800, UMTS/2100, and Wi-Fi/2.45 frequency bands. The proposed rectifier in this paper covers two additional operating frequencies at (0.92 and 2.65 GHz) with less electrical length and an improved RF-to-dc PCE as compares to the work reported in [9,21]. Using single dual-diode and sixth-order lumped elements MN across the three cell branches reported by the authors in [15] lowers the overall RF-to-DC PCE of the circuits. The frequency domain in [15,20] is not well exploited because of the narrow bandwidth across the operating frequencies besides the large electrical length from the two separate rectifiers in [20].

Table 2: Comparison of the proposed rectifier with the related work

The proposed multi-band rectifier demonstrates an improved RF-to-dc PCE. The fabricated rectifier prototype achieves over 64% PCE across the operating frequencies for an input power of 0 dBm. The design shows a better −10 dB operational bandwidth with the ability to extract practical RF signal across the designed frequencies than most of the reported work in the literature. The design also shows compactness and the capability of the circuit to drive a low-powered PMM using bq25504-674 EVM.

5  Conclusions

A multi-band rectifier with dual-port configuration is reported in this work. To match the input impedance of the rectifier to a 50 Ω transmission line, a Π-MN is introduced into the rectifier segment (Rectifier-1) at Port-1 for GSM/900. A combination of three cell branches MN consisting of MDL stub, a shunt radial stub, a shunt-curve impedance transformer, and a series inductor is terminated at Port-2 (Rectifier-2) for GSM/1800, UMTS/2100, and Wi-Fi/2.45–LTE/2600 operation. The rectifier fabricated prototype achieves a maximum measured RF-to-dc PCE of 82.3% for 3 dBm input power at 0.92 GHz, and a measured RF-to-dc PCE at low RF input power levels of (31.8%, 24%, 22.7%, 15%, and 14.1% for an input power of −20 dBm) at (0.92, 1.82, 2.1, 2.46, and 2.65 GHz), respectively. The rectifier ability to harvest ambient RF signal is demonstrated, and the rectifier realized 454 mV output dc voltage for the multi-tone input signal, which corresponds to about 33% RF-to-DC PCE from the available power density recorded by the spectrum analyzer. The rectified output dc from the proposed circuit drives a low-powered bq25504-674 EVM that generates 1.21 V from the dual-port configurations in the ambient environment. The proposed rectifier occupied a total size of 0.13λg × 0.1λg on the PCB board. The rectifier also shows compactness, improved RF-to-DC PCE at low input power, and good impedance matching bandwidth across the designed frequencies which, can be applied for ambient RFEH systems.

Funding Statement: This work was supported by TM R&D Malaysia under project number MMUE/190001.

Conflicts of Interest: The authors declare that they have no conflicts of interest to report regarding the present study.

This work is licensed under a Creative Commons Attribution 4.0 International License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.