%0 Journal Article
%A Xiao, Sheng
%A He, Jing
%A Yang, Xi
%A Zhou, Heng
%A Yuan, Yujie

%D 2022
%J Computer Systems Science and Engineering

%@ 
%V 40
%N 1
%P 273--286

%T Timing Error Aware Register Allocation in TS
%M doi:10.32604/csse.2022.019106
%U http://www.techscience.com/csse/v40n1/44237