Khalid A. Alissa¹, Mohammed Maray², Areej A. Malibari³, Sana Alazwari⁴, Hamed Alqahtani⁵, Mohamed K. Nour⁶, Marwa Obbaya⁷, Mohamed A. Shamseldin⁸, Mesfer Al Duhayyim^9,*

CMC-Computers, Materials & Continua, Vol.74, No.3, pp. 5349-5367, 2023, DOI:10.32604/cmc.2023.033532

Abstract Emerging technologies such as edge computing, Internet of Things (IoT), 5G networks, big data, Artificial Intelligence (AI), and Unmanned Aerial Vehicles (UAVs) empower, Industry 4.0, with a progressive production methodology that shows attention to the interaction between machine and human beings. In the literature, various authors have focused on resolving security problems in UAV communication to provide safety for vital applications. The current research article presents a Circle Search Optimization with Deep Learning Enabled Secure UAV Classification (CSODL-SUAVC) model for Industry 4.0 environment. The suggested CSODL-SUAVC methodology is aimed at accomplishing two core objectives such as secure communication via image… More >

Reeya Agrawal^1,*, Anjan Kumar¹, Salman A. AlQahtani², Mashael Maashi³, Osamah Ibrahim Khalaf⁴, Theyazn H. H. Aldhyani⁵

CMC-Computers, Materials & Continua, Vol.73, No.2, pp. 2313-2331, 2022, DOI:10.32604/cmc.2022.029019

Abstract Most modern microprocessors have one or two levels of on-chip caches to make things run faster, but this is not always the case. Most of the time, these caches are made of static random access memory cells. They take up a lot of space on the chip and use a lot of electricity. A lot of the time, low power is more important than several aspects. This is true for phones and tablets. Cache memory design for single bit architecture consists of six transistors static random access memory cell, a circuit of write driver, and sense amplifiers (such as voltage… More >