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REVIEW

A Comprehensive Literature Review of AI-Driven Application Mapping and Scheduling Techniques for Network-on-Chip Systems

Naveed Ahmad1, Muhammad Kaleem2, Mourad Elloumi3, Muhammad Azhar Mushtaq2, Ahlem Fatnassi4, Mohd Fazil5, Anas Bilal6,*, Abdulbasit A. Darem7,4
1 Department of Software Engineering, University of Sargodha, Sargodha, 40100, Punjab, Pakistan
2 Department of Information Technology, University of Sargodha, Sargodha, 40100, Punjab, Pakistan
3 Department of Computer Science and Artificial Intelligence, College of Computing and Information Technology, University of Bisha, Bisha, 61922, Saudi Arabia
4 Department of Computer Science, College of Science, Northern Border University, Arar, 73213, Saudi Arabia
5 College of Computer and Information Sciences, Imam Mohammad Ibn Saud Islamic University (IMSIU), Riyadh, Saudi Arabia
6 College of Information Science and Technology, Hainan Normal University, Haikou, 571158, China
7 Center for Scientific Research and Entrepreneurship, Northern Border University, Arar, 73213, Saudi Arabia
* Corresponding Author: Anas Bilal. Email: email

Computer Modeling in Engineering & Sciences https://doi.org/10.32604/cmes.2025.074902

Received 21 October 2025; Accepted 17 December 2025; Published online 16 January 2026

Abstract

Network-on-Chip (NoC) systems are progressively deployed in connecting massively parallel megacore systems in the new computing architecture. As a result, application mapping has become an important aspect of performance and scalability, as current trends require the distribution of computation across network nodes/points. In this paper, we survey a large number of mapping and scheduling techniques designed for NoC architectures. This time, we concentrated on 3D systems. We take a systematic literature review approach to analyze existing methods across static, dynamic, hybrid, and machine-learning-based approaches, alongside preliminary AI-based dynamic models in recent works. We classify them into several main aspects covering power-aware mapping, fault tolerance, load-balancing, and adaptive for dynamic workloads. Also, we assess the efficacy of each method against performance parameters, such as latency, throughput, response time, and error rate. Key challenges, including energy efficiency, real-time adaptability, and reinforcement learning integration, are highlighted as well. To the best of our knowledge, this is one of the recent reviews that identifies both traditional and AI-based algorithms for mapping over a modern NoC, and opens research challenges. Finally, we provide directions for future work toward improved adaptability and scalability via lightweight learned models and hierarchical mapping frameworks.

Keywords

Application mapping; mapping techniques; network-on-chip; system on chip; optimisation
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