Vol.72, No.1, 2022, pp.1861-1875, doi:10.32604/cmc.2022.023516
Invariant of Enhanced AES Algorithm Implementations Against Power Analysis Attacks
  • Nadia Mustaqim Ansari1,*, Rashid Hussain2, Sheeraz Arif3, Syed Sajjad Hussain4
1 Department of Electronic Engineering, Dawood University of Engineering & Technology, Karachi, Pakistan
2 Faculty of Engineering Sciences and Technology, Hamdard University, Karachi, Pakistan
3 Faculty of Information Technology, Salim Habib University, Karachi, Pakistan
4 Faculty of Computer Sciences, SZABIST, Karachi, Pakistan
* Corresponding Author: Nadia Mustaqim Ansari. Email:
(This article belongs to this Special Issue: Computational Models for Pro-Smart Environments in Data Science Assisted IoT Systems)
Received 11 September 2021; Accepted 10 January 2022; Issue published 24 February 2022
The security of Internet of Things (IoT) is a challenging task for researchers due to plethora of IoT networks. Side Channel Attacks (SCA) are one of the major concerns. The prime objective of SCA is to acquire the information by observing the power consumption, electromagnetic (EM) field, timing analysis, and acoustics of the device. Later, the attackers perform statistical functions to recover the key. Advanced Encryption Standard (AES) algorithm has proved to be a good security solution for constrained IoT devices. This paper implements a simulation model which is used to modify the AES algorithm using logical masking properties. This invariant of the AES algorithm hides the array of bits during substitution byte transformation of AES. This model is used against SCA and particularly Power Analysis Attacks (PAAs). Simulation model is designed on MATLAB simulator. Results will give better solution by hiding power profiles of the IoT devices against PAAs. In future, the lightweight AES algorithm with false key mechanisms and power reduction techniques such as wave dynamic differential logic (WDDL) will be used to safeguard IoT devices against side channel attacks by using Arduino and field programmable gate array (FPGA).
Side channel attacks; power analysis attacks; network security; masking; advance encryption standard
Cite This Article
N. Mustaqim Ansari, R. Hussain, S. Arif and S. Sajjad Hussain, "Invariant of enhanced aes algorithm implementations against power analysis attacks," Computers, Materials & Continua, vol. 72, no.1, pp. 1861–1875, 2022.
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