Open Access

ARTICLE

Enhancing Efficiency in Lattice-Based Post-Quantum Cryptography with Systolic Array Polynomial Multiplication

Atef Ibrahim^1,*, Fayez Gebali²

1 Computer Engineering Department, College of Computer Engineering and Sciences, Prince Sattam Bin Abdulaziz University, Al-Kharj, Saudi Arabia
2 Electrical and Computer Engineering Department, University of Victoria, Victoria, BC, Canada

* Corresponding Author: Atef Ibrahim. Email:

Computers, Materials & Continua 2026, 88(3), 41 https://doi.org/10.32604/cmc.2026.081651

Received 10 March 2026; Accepted 20 May 2026; Issue published 23 July 2026

Abstract

The ongoing expansion of the Internet of Things (IoT) fundamentally alters industrial and economic paradigms by integrating intelligent nodes throughout operational frameworks. Nonetheless, vulnerabilities surrounding system integrity and data confidentiality present major bottlenecks to widespread adoption, a dilemma severely intensified by impending quantum computing capabilities. Defending these networks demands the integration of post-quantum cryptographic primitives; yet, the severe hardware constraints characterizing peripheral IoT components complicate practical deployment. Quantum-resistant lattice cryptography offers a highly promising pathway to overcome these limitations, largely because the foundational security and throughput of these protocols hinge on polynomial multiplication performance. Consequently, optimizing the computational speed and architectural efficiency of this specific algebraic operation drastically enhances the viability of lattice-reliant defense mechanisms. To address this need, this study develops a specialized systolic array architecture engineered explicitly as an underlying arithmetic engine for polynomial multiplication within the Binary Ring Learning With Errors (BRLWE) protocol. Tailored for low-power hardware security modules (HSMs) situated at the network edge, the proposed circuit achieves rapid modular multiplication while ensuring a highly compact silicon footprint. By aligning the hardware layout with the precise algebraic properties of the BRLWE variation, this approach delivers a scalable, optimized framework for constructing secure IoT networks capable of resisting quantum adversaries, thereby acting as a pivotal building block for resilient industrial edge protection. Additionally, this study aligns with UN Sustainable Development Goals 8 and 9 by fostering digital trust in emerging technological systems and supporting the safe, adaptive growth of modern electronic economies.

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Keywords

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