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Low Area PRESENT Cryptography in FPGA Using TRNG-PRNG Key Generation

T. Kowsalya1, R. Ganesh Babu2, B. D. Parameshachari3, Anand Nayyar4, Raja Majid Mehmood5,*

1 Department of Electronic and Communication Engineering, Muthayammal Engineering College, Rasipuram, Namakkal, Tamilnadu, India
2 Department of Electronics and Communication Engineering, SRM TRP Engineering College, Tiruchirappalli, Tamilnadu, India
3 Department of Telecommunication Engineering, GSSS Institute of Engineering and Technology for Women, Mysuru, India
4 Faculty of Information Technology, Graduate School, Duy Tan University, Da Nang, 550000, Viet Nam
5 Department of Information and Communication Technology, School of Electrical and Computer Engineering, Xiamen University Malaysia, Sepang, 43900, Malaysia

* Corresponding Author: Raja Majid Mehmood. Email: email

Computers, Materials & Continua 2021, 68(2), 1447-1465. https://doi.org/10.32604/cmc.2021.014606

Abstract

Lightweight Cryptography (LWC) is widely used to provide integrity, secrecy and authentication for the sensitive applications. However, the LWC is vulnerable to various constraints such as high-power consumption, time consumption, and hardware utilization and susceptible to the malicious attackers. In order to overcome this, a lightweight block cipher namely PRESENT architecture is proposed to provide the security against malicious attacks. The True Random Number Generator-Pseudo Random Number Generator (TRNG-PRNG) based key generation is proposed to generate the unpredictable keys, being highly difficult to predict by the hackers. Moreover, the hardware utilization of PRESENT architecture is optimized using the Dual port Read Only Memory (DROM). The proposed PRESENT-TRNG-PRNG architecture supports the 64-bit input with 80-bit of key value. The performance of the PRESENT-TRNG-PRNG architecture is evaluated by means of number of slice registers, flip flops, number of slices Look Up Table (LUT), number of logical elements, slices, bonded input/output block (IOB), frequency, power and delay. The input retrieval performances analyzed in this PRESENT-TRNG-PRNG architecture are Peak Signal to Noise Ratio (PSNR), Structural Similarity Index (SSIM) and Mean-Square Error (MSE). The PRESENT-TRNG-PRNG architecture is compared with three different existing PRESENT architectures such as PRESENT On-The-Fly (PERSENT-OTF), PRESENT Self-Test Structure (PRESENT-STS) and PRESENT-Round Keys (PRESENT-RK). The operating frequency of the PRESENT-TRNG-PRNG is 612.208 MHz for Virtex 5, which is high as compared to the PRESENT-RK.

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APA Style
Kowsalya, T., Babu, R.G., Parameshachari, B.D., Nayyar, A., Mehmood, R.M. (2021). Low area PRESENT cryptography in FPGA using TRNG-PRNG key generation. Computers, Materials & Continua, 68(2), 1447-1465. https://doi.org/10.32604/cmc.2021.014606
Vancouver Style
Kowsalya T, Babu RG, Parameshachari BD, Nayyar A, Mehmood RM. Low area PRESENT cryptography in FPGA using TRNG-PRNG key generation. Comput Mater Contin. 2021;68(2):1447-1465 https://doi.org/10.32604/cmc.2021.014606
IEEE Style
T. Kowsalya, R.G. Babu, B.D. Parameshachari, A. Nayyar, and R.M. Mehmood "Low Area PRESENT Cryptography in FPGA Using TRNG-PRNG Key Generation," Comput. Mater. Contin., vol. 68, no. 2, pp. 1447-1465. 2021. https://doi.org/10.32604/cmc.2021.014606

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cc This work is licensed under a Creative Commons Attribution 4.0 International License , which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.
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