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Reversible Logic Based MOS Current Mode Logic Implementation in Digital Circuits

S. Sharmila Devi1,*, V. Bhanumathi2

1 Department of Electronics and Communication Engineering, Sri Ramakrishna Engineering College, Coimbatore, India
2 Department of Electronics and Communication Engineering, Anna University, Regional Campus, Coimbatore, India

* Corresponding Author: S. Sharmila Devi. Email: email

Computers, Materials & Continua 2022, 70(2), 3609-3624. https://doi.org/10.32604/cmc.2022.020426

Abstract

Now a days, MOS Current Mode Logic (MCML) has emerged as a better alternative to Complementary Metal Oxide Semiconductor (CMOS) logic in digital circuits. Recent works have only traditional logic gates that have issues with information loss. Reversible logic is incorporated with MOS Current Mode Logic (MCML) in this proposed work to solve this problem, which is used for multiplier design, D Flip-Flop (DFF) and register. The minimization of power and area is the main aim of the work. In reversible logic, the count of outputs and inputs is retained as the same value for creating one-to-one mapping. A unique output vector set can be generated for each input vector set and information loss is also prevented. In reversible MCML based multiplier, reversible logic full adder is utilized to minimize the area and power. D flip-flops based on reversible MCML are often designed to store information that is then combined to form a reversible MCML based register. The proposed reversible MCML multiplier attains average power of 0.683~mW, Reversible MCML based DFF achieves 0.56 μW and Reversible MCML based 8-bit register attains 04.04 μW. The result shows that the proposed Reversible MCML based multiplier, Reversible MCML based D flip-flop and Reversible MCML based register achieves better performance in terms of current, power dissipation, average power and area.

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Cite This Article

APA Style
Devi, S.S., Bhanumathi, V. (2022). Reversible logic based MOS current mode logic implementation in digital circuits. Computers, Materials & Continua, 70(2), 3609-3624. https://doi.org/10.32604/cmc.2022.020426
Vancouver Style
Devi SS, Bhanumathi V. Reversible logic based MOS current mode logic implementation in digital circuits. Comput Mater Contin. 2022;70(2):3609-3624 https://doi.org/10.32604/cmc.2022.020426
IEEE Style
S.S. Devi and V. Bhanumathi, "Reversible Logic Based MOS Current Mode Logic Implementation in Digital Circuits," Comput. Mater. Contin., vol. 70, no. 2, pp. 3609-3624. 2022. https://doi.org/10.32604/cmc.2022.020426



cc This work is licensed under a Creative Commons Attribution 4.0 International License , which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.
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