Artificial Neural Network Modeling and LO-CORDIC Multi-Fading Generation for UAV Channel Simulator

1  Introduction

With the rapid advancement of UAV technology and its large-scale popularization in civil low-altitude applications, A2G communication has emerged as the core enabling technology for low-altitude wireless networks and has been widely applied in typical scenarios, including environmental monitoring, agricultural remote sensing, and emergency communications [1–4]. The fading characteristics of wireless channels directly determine core performance metrics of UAV communication systems, such as bit error rate, link capacity, and transmission reliability [5,6]. Channel simulators are indispensable throughout the full workflow of communication system design, algorithm verification, and hardware-in-the-loop testing: they can reproduce complex and diverse communication scenarios in a controlled laboratory environment and provide accurate modeling of channel fading characteristics for UAV A2G links [7,8]. However, the practical performance of existing universal channel simulators is fundamentally limited by an intractable three-way trade-off among fading modeling fidelity, real-time processing capability, and hardware resource consumption on FPGA platforms.

Path loss is the primary characterization of large-scale channel fading, and traditional path-loss modeling approaches are primarily categorized into deterministic methods (DM) and empirical methods (EM), both of which have inherent limitations in balancing accuracy and practical applicability in real-world UAV applications [9–13]. Specifically, DMs based on ray tracing (RT) achieve high modeling accuracy but suffer from prohibitive computationa complexity and a heavy reliance on high-precision geographic information of the target environment [9,10]. EMs, such as CI and 3GPP standards, are simple to calculate but suffer from limited scene adaptability; prediction errors occur due to dynamic changes in UAV flight altitude and mobility. In recent years, machine learning has attracted significant attention in UAV channel parameter prediction due to its excellent nonlinear fitting and data analysis capabilities. For example, the authors in [11] used machine learning regression to develop a millimeter-wave UAV path-loss model and investigated the impact of scene geometry and flight parameters on path loss in 5G and beyond scenarios. The authors of [12] developed an air-to-ground path-loss model at 3.6 GHz for agricultural scenarios using a deep neural network (DNN) and investigated the impact of UAV altitude, horizontal distance, and crop characteristics on both line-of-sight (LoS) and non-line-of-sight (NLoS) path loss. The authors in [13] applied deep reinforcement learning to optimize 5G UAV placement in mountainous environments and investigated how terrain features and UAV altitude influence coverage and signal quality. However, as demonstrated by the above-reviewed studies, most existing relevant studies are deployed on desktop computers or server platforms, with model training still mainly based on simulated data, and commercial wireless channel emulators have not yet been widely used for model deployment.

Small-scale fading modeling for UAV A2G channels primarily focuses on multipath effects and Doppler effects [14,15], with widely used representative models including the Shadowed-Rician, Rayleigh, and Weibull models [16–18]. As the requirements for channel simulation accuracy and efficiency continue to rise, the real-time performance of software-only implementation can no longer meet the strict timing constraints of practical channel emulators. The sum-of-sinusoids (SoS) method is widely adopted in traditional hardware-based fading generation; however, this method consumes substantial on-chip hardware resources for high-precision or large-scale MIMO channel emulation, and the generated fading samples exhibit inherent phase discontinuity and non-stationarity [16]. To address the above limitations, the coordinate rotation digital computer (CORDIC) algorithm has emerged as a promising alternative for hardware-side fading generation, enabling low-cost fixed-point implementation of various basic functions and requiring only a small amount of RAM resources compared with the look-up table (LUT) method. For instance, the authors in [17] proposed a high-radix CORDIC-based FFT architecture with a unified Radix-2/4/8/16 optimization framework to reduce the number of iterations, but it still suffers from the lack of dynamic adaptability due to its fixed step size. The authors in [18] proposed a general multi-fading generator based on an improved greedy CORDIC for wireless channel digital twins, which reduces the iteration latency of classical CORDIC by 62.5% and optimizes FPGA resource utilization. Even so, the initialization and parameter update processes of the CORDIC algorithm still consume multiple clock cycles, which becomes a major performance bottleneck, especially in large-scale MIMO or non-stationary UAV A2G channel emulation scenarios.

With the rapid development of FPGA platforms integrated with PL and PS in recent years, the widespread adoption of their PL + PS architecture has enabled a new solution for real-time simulation of UAV A2G channels [19,20]. This study endeavors to fill this gap, and the specific innovations and contributions are outlined as follows:

1.   A hardware/software co-design UAV A2G channel simulator based on the FPGA PL + PS architecture is proposed: the PS side is used to deploy and optimize pre-trained neural network models for path loss prediction, while the PL side is responsible for implementing multipath fading generation and constructing a hardware-efficient fading generation module.

2.   For UAV air-to-ground (A2G) communication scenarios, we first conduct channel measurement campaigns in typical farmland scenarios at 3.6 GHz for model training and validation, and establish a valid dataset containing three core propagation features (UAV altitude, propagation distance, and carrier frequency) and the corresponding measured path loss values. Based on this dataset, we propose a lightweight BPNN-based path loss prediction model and deploy it on the PS side of a heterogeneous FPGA platform. With a 3-input, 2-hidden-layer, 1-output architecture, the model addresses the limited predictive accuracy of traditional empirical models in complex agricultural scenarios, while its lightweight parameter count avoids the deployment limitations of over-parameterized neural networks. We optimize the model via input feature standardization and L2 regularization to improve convergence and generalization, and adopt a “PC-side training + PS-side inference” deployment strategy to achieve sub-millisecond real-time path-loss inference.

3.   A locally optimal CORDIC (LO-CORDIC) algorithm is proposed, and related hardware circuits for trigonometric functions, exponential functions, and natural logarithms are developed based on this algorithm. The LO-CORDIC algorithm adopts a dynamic iteration mechanism: by removing the dedicated z-register, adopting dynamic angle selection, and realizing adaptive iteration termination, it effectively solves the problem of high latency in the classical CORDIC algorithm. The hardware circuit of LO-CORDIC is composed of three core modules: a dynamic angle mapping module, a local optimal angle selection module, and an adaptive iteration module. By adopting a parallel pipeline structure and optimizing the control logic, the algorithm reduces the consumption of on-chip resources and improves real-time performance.

The remainder of this paper is structured as follows. Section 2 introduces the theoretical foundations and related technologies. Section 3 focuses on the BPNN model, covering its design and deployment for path loss prediction. Section 4 proposes a locally optimal CORDIC-based method for generating arbitrary channel fading. Section 5 presents the experimental results and validation. Finally, Section 6 summarizes the main conclusions of this study.

2  Theoretical Foundations and Related Technologies

In this work, the targeted application scenario is a low-altitude UAV A2G communication channel simulation in agricultural farmland environments. In this scenario, two main challenges exist:

1.   Traditional empirical models (e.g., CI model, 3GPP TR 38.901) cannot accurately capture the influence of complex near-ground propagation effects on path loss, resulting in insufficient prediction accuracy;

2.   When using conventional LUT or CORDIC algorithms to generate small-scale fading in real time on resource-constrained FPGA platforms, high computation latency and large hardware resource overhead are often encountered.

These two challenges directly limit the real-time performance and accuracy of UAV A2G channel simulators and are key challenges in system design.

The core characteristics of wireless channels are primarily reflected in two categories: large-scale fading and small-scale fading, whose propagation properties are significantly influenced by terminal mobility, UAV altitude variation, and complex ground environments [3,9,21,22].

Large-scale fading is dominated by path loss, which is closely related to UAV altitude, propagation distance, and carrier frequency. For A2G scenarios, the path loss model can be formulated as an extension of the free-space model by incorporating an additional loss term, expressed as:

Lpath(d,f,h)=20log10⁡(d)+20log10⁡(f)+32.45+Δ(h)+LA2G(1)

where Lpath is the total A2G path loss in dB, d is the propagation distance in km, f is the carrier frequency in MHz, h is the UAV flight altitude in m, Δ(h) is the height-dependent additional loss, and LA2G is the scene-specific additional loss.

Although deterministic and empirical models for traditional path loss modeling have their respective applications, and typical models CI and 3GPP have been adaptively optimized for low-altitude scenarios [23,24], such fixed models are unable to flexibly fit the nonlinear variation of path loss in dynamic UAV scenarios and tend to deviate from measured data [12]. Therefore, machine learning methods are adopted in this study to optimize path loss modeling.

Small-scale fading is mainly caused by multipath propagation and Doppler shift, with signal components arriving at different delays and angles due to reflection, refraction, and diffraction, which is a core consideration for the real-time design of channel simulators [25,26]. For such fading characteristics, the channel impulse response (CIR) can be modeled as:

h(t,τ)=∑l=1LP¯l(t)⋅αl(t)⋅ej(2πfD,lt+θl,0)⋅δ(τ−τl(t))+w(t)(2)

where L is the total number of multipath components, P¯l(t) is the average power of the l-th multipath component, αl(t) is the small-scale fading factor of the corresponding path, fD,l is the Doppler frequency shift, θl,0 is the fixed initial phase, τl(t) is the time-varying propagation delay, δ(⋅) is the Dirac delta function, and w(t) is the additive white Gaussian noise (AWGN).

Current commercial channel simulators are mostly implemented on FPGA hardware; typical examples include the Anritsu MD8475A, the Spirent Vertex series, and the Keysight F8800A PROPSIM F64 [27,28]. The PL+PS heterogeneous architecture, which combines the dual advantages of the Processing System and Programmable Logic, has become an ideal hardware platform for wireless channel simulators in recent years [29]. This FPGA-based heterogeneous (PS+PL) architecture is illustrated in Fig. 1 for UAV air-to-ground (A2G) channel emulation. The PS side is based on ARM Cortex-A9/A53 embedded cores, specialized in complex algorithmic operations and lightweight inference of pre-trained machine learning models, and is suitable for large-scale data processing. The PL side consists of programmable logic resources, including Configurable Logic Blocks (CLB), look-up tables (LUT), flip-flops (FF), and digital signal processor (DSP) slices, featuring high parallelism, low latency, and flexible reconfiguration, and is applicable to real-time signal processing with massive repetitive operations. Their efficient division of labor balances the channel simulator’s modeling accuracy and real-time performance.

Figure 1: FPGA PS+PL heterogeneous architecture for UAV A2G channel simulation.

Machine learning technology has a distinct advantage in fitting complex nonlinear relationships, which can effectively address the limited adaptability of traditional path loss models [11,12,30]. The BPNN, as a classic multi-layer feedforward neural network, consists of an input layer, one or more hidden layers, and an output layer, and trains the model through the iterative process of forward signal propagation and error backpropagation. In this study, the input layer includes UAV altitude, propagation distance, and carrier frequency; the output layer is the path loss value; and the number of hidden-layer neurons is determined using the cross-validation method. The output of hidden layer neurons can be formulated as:

oj=f(∑i=1nwjixi+bj)(3)

where oj is the output of the j-th hidden neuron, f(⋅) is the hidden layer activation function, wji and bj are the connection weight and bias term respectively, and xi is the i-th input feature of the model.

The CORDIC algorithm is an iterative numerical method for fixed-point computation of transcendental functions (e.g., trigonometric and exponential functions) without dedicated hardware multipliers, and it is a key technology for channel fading generation on FPGA platforms [17,18,27,31]. It decomposes arbitrary-angle coordinate rotations into fixed-angle micro-rotations, enabling complex calculations via shift, addition, and subtraction operations for resource-constrained real-time simulation.

The rotation mode of CORDIC is based on 2D coordinate rotation: given initial coordinates (x0,y0) and target rotation angle θ, n iterations approximate the target rotation as:

{xi+1=xi−di⋅yi⋅2−iyi+1=yi+di⋅xi⋅2−izi+1=zi+diarctan⁡(2−i)(4)

where i is the iteration number; di is the rotation direction factor determined by the sign of the residual rotation angle, with di=+1 for counterclockwise rotation and di=−1 for clockwise rotation); 2−i is the shift factor replacing multiplication to reduce hardware complexity; and arctan(2−i) is the fixed micro-rotation angle for iteration i, which can be pre-stored in a small LUT.

After convergence, the final coordinates are multiplied by a global scaling factor Kn to compensate for amplitude attenuation, which is defined as:

Kn=∏n−1i=011+2−2i(5)

when n≥16, Kn≈0.607252935, enabling amplitude correction via hardware fixed-point multiplication without extra iterations.

3  ANN Model Design for A2G Path Loss Prediction

3.1 Framework of BPNN-Based Path Loss Prediction

A BPNN-based path loss prediction framework is developed for UAV air-to-ground (A2G) communications, which consists of four key steps: measured data acquisition, feature preprocessing, network training and embedded deployment, as illustrated in Fig. 2. First, field tests are conducted in typical A2G scenarios to gather three key features (UAV altitude, propagation distance, and carrier frequency) and record the corresponding measured path loss. Then, raw data is filtered for outliers and then normalized to unify feature dimensions, thus ensuring numerical stability in subsequent model training. After that, the preprocessed dataset is partitioned into a training set (70%), a validation set (15%), and a test set (15%): the training set is used for iterative weight and bias updates via error back-propagation, the validation set is employed to monitor overfitting, tune hyperparameters (e.g., learning rate, number of epochs) and implement an early stopping strategy. The preprocessed features are fed into the BPNN model for training, where the network weights and biases are iteratively optimized using the error back-propagation algorithm with the Adam optimizer. Once training is complete, the model parameters are exported and deployed on the PS side of the FPGA. Subsequently, the deployed model is validated by inputting the test set features into the PS-side model to generate predicted path loss values, which are compared with the measured path loss values of the test set to quantitatively evaluate the real-time prediction performance of the deployed model in practical scenarios.

Figure 2: BPNN-based path loss prediction framework for agricultural UAV A2G channels.

3.2 Network Architecture Design

To improve the convergence speed and generalization performance of model training, standardization is applied to the input features, which is calculated as:

xinorm=xi−μiσi(6)

where xi denotes the original input feature, μi represents the mean of the feature in the training dataset, σi denotes the standard deviation of the feature in the training dataset, and xinorm is the standardized feature value. This process can eliminate the dimensional differences among different features, prevent a single feature from dominating the network training due to numerical scale disparities, and thus enhance the stability and convergence speed of network training.

The BPNN model constructed in this study consists of an input layer, two hidden layers and an output layer. Specifically, three neurons are set in the input layer, corresponding to the three features of propagation distance, UAV height, and carrier frequency; the number of neurons in the first hidden layer is N1=16 and that in the second hidden layer is N2=32; one neuron is configured in the output layer to output the predicted path loss value. Practical research has proven that the two-hidden-layer structure is more suitable for the research scenario, as a single-hidden-layer network cannot fully characterize the nonlinear propagation characteristics in air-to-ground communications, while the two-hidden-layer structure can not only improve the feature expression capability of the model but also control the parameter scale within a reasonable range to meet the resource constraints of FPGA deployment [32]. The overall forward propagation process of the BPNN can be uniformly expressed as:

y^=f3(∑j=1N2w3,j⋅f2(∑k=1N1w2,jk⋅f1(∑i=13w1,ixA2G,i+b1,k)+b2,j)+b3,1),xA2G=[dhf](7)

where xA2G denotes the input feature vector, including propagation distance, UAV height, and carrier frequency; w are the weight matrices of each layer, while b are the corresponding bias vectors; f1(⋅) and f2(⋅) use the ReLU function, and the output layer activation function f3(⋅) is linear; y^ represents the predicted path loss value, which can be chosen according to LoS and NLoS propagation conditions.

To mitigate overfitting, we adopt the mean squared error (MSE) loss function combined with L2 regularization, which is expressed as:

LMSE=1N∑i=1N(yi−y^i)2+λ∑l=1L‖wl‖22(8)

where N denotes the number of training samples, yi is the true path loss value, and λ is the L2 regularization coefficient, which is set to 1e–4 in this study.

We update the network parameters via the Adam optimizer (a stochastic gradient descent based method), with the weight update rule defined as:

Wl(t+1)=Wl(t)−η∂LMSE∂Wl(9)

where η is the learning rate and l indexes the network layer. In our experiments, we set the total number of training epochs to 100. We initialize the learning rate to η=0.001 and apply a step-decay strategy with a decay factor of 0.2 after the 40th epoch. An early stopping strategy with a patience of 10 is also adopted to further avoid overfitting—the validation set (15% of the dataset) is used to monitor the validation loss during training, and early stopping is triggered when the validation loss does not decrease for 10 consecutive epochs (patience = 10). This setup enhances the stability of late-stage training and avoids parameter oscillation.

3.3 Model Deployment

For the trained BPNN model, this study adopts a deployment strategy of “training on PC and inference on PS side”. The model is first trained using Python on a PC, after which core parameters including weight matrices (w1/w2/w3) and bias vectors (b1/b2/b3) of each layer are extracted and exported, saved as floating-point text files [33]. These parameter files are then transferred to the FPGA PS end (ARM-based embedded Linux system), and forward propagation inference code is written in C/C++ to reproduce the ReLU activation and fully connected operation processes of the BPNN, thereby achieving real-time conversion from input features (propagation distance, UAV height, carrier frequency) to predicted path loss values.

The number of multiply-accumulate (MAC) operations for forward propagation per sample is calculated as:

CFP=N1⋅Nin+N2⋅N1+Nout⋅N2=16×3+16×32+1×32=592 MACs/sample(10)

We estimate the forward propagation inference latency per sample based on a typical FPGA PS end hardware configuration: the CPU clock frequency is fclk = 667 MHz and parallel execution of P=16 MAC operations per cycle, as follows:

Tinf=CFPfclk⋅P=592667×106×16≈55.5 ns(11)

This result demonstrates that the model’s single-sample inference latency is well below 1 ms, fully meeting the real-time path loss prediction requirements for air-to-ground communications.

In contrast, more recent deep learning models such as CNN, LSTM, and lightweight Transformer-based architectures, even after standard quantization and operator optimization, typically require one to three orders of magnitude more MAC operations per inference than our lightweight BPNN. When deployed on the same ARM Cortex-A9 core (667 MHz) without dedicated hardware acceleration, their single-sample inference latency ranges from hundreds of microseconds to tens of milliseconds, far exceeding the strict sub-millisecond requirement for real-time UAV channel simulation [34]. Therefore, the proposed lightweight BPNN achieves a more practical and favorable balance between prediction accuracy and real-time performance on resource-constrained FPGA PS platforms.

4  LO-CORDIC for Channel Fading Generation

4.1 Hardware Implementation of Small-Scale Fading

As shown in Eq. (2) of Section 2, in hardware implementations of channel fading for channel simulation, the small-scale fading factor αl(t) is key to reproducing various channel transmission characteristics. The efficiency of its operation directly affects the real-time performance and hardware overhead of the entire channel simulation system. During deployment on the FPGA hardware platform, the nonlinear operations, such as complex modulus, complex exponential, and square root, used to generate this factor are relatively difficult to implement efficiently with simple logic circuits. The traditional implementation method not only suffers from a certain time delay but also consumes a significant amount of logic resources, making it hard to meet the real-time requirements of time-varying channel simulation. To this end, this paper introduces the CORDIC algorithm to replace the original LUT method, adopts rotation iteration for complex nonlinear operations, and improves the CORDIC algorithm to effectively enhance hardware implementation efficiency and real-time performance. Among these fading types, the hardware implementation of the four most typical small-scale fading types, namely Rayleigh, Rice, Nakagami, and Weibull, all rely on the improved CORDIC algorithm to complete the core operations. The specific details are presented in Table 1.

4.2 Improved LO-CORDIC Algorithm Design

The classical CORDIC algorithm allows hardware-efficient nonlinear operations but suffers from high latency due to its fixed 16-iteration scheme and the hardware needed to manage the z-path residual angle.

The LO-CORDIC algorithm mitigates these problems by removing the dedicated z-register, using dynamic angle selection, and enabling adaptive iteration termination. As a result, the number of iterations varies dynamically from 3 to 7, with an average of only 4.5 iterations in practical applications—achieving up to a 4× reduction in iteration latency compared to the classical 16-iteration scheme. This approach reduces hardware overhead and latency without compromising accuracy compared to the standard CORDIC.

To further optimize the rotation process, the input angle θ is first mapped to a locally optimal sub-interval to eliminate redundant operations. The following formula determines the optimal sub-interval:

k∗=arg⁡mink=0,…,7⁡|θ−kπ4|(12)

where the width of each sub-interval is π/4. The selected sub-interval narrows the search space of micro-rotation angles, thereby reducing the overall computational complexity.

Subsequently, the shift value bi for each iteration is chosen dynamically. Unlike the classical CORDIC, which iterates over a fixed sequence of micro-rotation angles for i=0,1,…,n−1, LO-CORDIC selects bi from a candidate set B={0,1,2,⋯,15} by minimizing the residual angle error. Let the current residual angle be:

zi=θ−∑j=0i−1dj⋅arctan⁡(2−bj)(13)

Then the rotation direction di and shift value bi are jointly selected as:

(di,bi)=arg⁡mind∈{−1,1},k∈B⁡|zi−d⋅arctan⁡(2−k)|(14)

where di represents the rotation direction in the i-th iteration, corresponding to this dynamic selection, the vector update equations are modified as:

xi+1=xi−di⋅yi⋅2−biyi+1=yi+di⋅xi⋅2−bi(15)

This strategy ensures that each micro-rotation maximizes the reduction of residual angle error, resulting in fewer total iterations.

The algorithm terminates iterations once the normalized error falls below a precision threshold (e.g., 10-5), indicating amplitude convergence. Eq. (16) formalizes this condition, where K represents the cumulative scaling factor.

Ei=|K2(xi2+yi2)−1|(16)

After convergence, the final vector is multiplied by the cumulative scaling factor K to compensate for amplitude attenuation, given by:

xfinal=K⋅xnyfinal=K⋅yn(17)

where n is the actual number of iterations performed. Unlike the classical CORDIC with a fixed scaling factor, K in LO-CORDIC is iteration-dependent due to the dynamic shift selection, requiring real-time compensation.

The hardware architecture of LO-CORDIC comprises three core functional modules: the dynamic angle mapping module, the local-optimal angle selection module, and the adaptive iteration module. LO-CORDIC has three functional modules. The mapping module finds the best sub-interval for the input angle. The selection module then chooses the corresponding micro-rotation angle and outputs its direction code. Meanwhile, the iteration module performs shift-add operations and tracks convergence in real time. Fig. 3 illustrates the data flow and module interconnections, which are designed for parallel and pipelined FPGA implementation. Together, these modules reduce register requirements and simplify control logic—making LO-CORDIC suitable for high-throughput applications.

Figure 3: Flowchart and hardware architecture of the proposed LO-CORDIC algorithm.

Table 2 summarizes the key differences between the proposed LO-CORDIC and other CORDIC variants.

4.3 Simulation Results and Performance Comparison

The simulation is performed using Xilinx Vivado 2023.2 (behavioral simulation and timing simulation). The target FPGA is the XC7Z045-2FFG900I, with the PL clock frequency set to 100 MHz and 16-bit fixed-point quantization. The test angle range is from 0∘ to 180∘ with a step size of 1∘, resulting in 180 test angles. The benchmark is the classical 16-iteration CORDIC.

To quantitatively verify the hardware implementation advantages of the LO-CORDIC algorithm, comprehensive simulation and comparative analysis were conducted on standalone IP cores of conventional CORDIC and LO-CORDIC, with 15∘ as the typical test angle. The simulation waveforms are shown in Fig. 4.

Figure 4: Timing waveforms of conventional CORDIC and LO-CORDIC (15∘ test angle).

The test results demonstrate that the conventional CORDIC employs a fixed 16-stage iterative pipeline architecture, requiring 16 iteration stages plus one output latch stage—a total of 17 clock cycles—to complete the 15∘ angle operation. In contrast, with dynamic angle mapping, locally optimal rotation selection, and adaptive iteration termination mechanisms, LO-CORDIC requires only 4 iteration stages and one output latch stage, totaling 5 clock cycles. Statistics obtained from 180 test angles show that the average number of LO-CORDIC iterations is approximately 4.5 iterations. Compared with conventional CORDIC, this reduction in iteration count reduces LO-CORDIC’s operation latency by approximately 12 cycles, corresponding to a 70.6% reduction in the number of iteration stages.

5  Experimental Verification and Result Analysis

5.1 Path Loss Prediction Performance Analysis

The experimental validation presented in this section is conducted on a custom-developed channel emulator platform. The core computational device of this platform is a Xilinx Zynq-7000 SoC (XC7Z045-2FFG900I), which integrates a dual-core ARM Cortex-A9 Processing System (PS) with a Kintex-7-based Programmable Logic (PL) fabric. The following subsections detail the path loss prediction performance analysis and the small-scale fading generation validation using the LO CORDIC algorithm, respectively.

5.1.1 Data Acquisition and Preprocessing

A2G channel measurements were conducted in Xuyi, Jiangsu Province, China. In consideration of the practical application requirements of the project, rural farmland with a simple scatterer distribution in this area was selected as the measurement site. The area is generally open, which can effectively reduce the interference of complex scattering environments on the path loss measurement results. Both LOS and NLOS propagation scenarios were included in the measurements. A dedicated A2G channel sounder was built for the measurements, which consists of an unmanned aerial vehicle (UAV)-borne transmitter (TX) and a ground-fixed receiver (RX). The TX is composed of a hexacopter UAV, an omnidirectional antenna, a Global Positioning System (GPS) antenna and a software-defined radio (SDR) signal transmission platform, with the sounding signal processed by the radio frequency (RF) module and then transmitted via the omnidirectional antenna. The RX includes an omnidirectional antenna, a GPS module, an uninterruptible power supply and an SDR signal processing platform equipped with RF and baseband processing modules. The received signal is captured by the omnidirectional antenna and then sent to the baseband processing module through the RF module for analysis.

The collected PL measured data of farmland in Xuyi were randomly divided into a training set, a validation set, and a test with a ratio of 14:3:3. The training set was used for the iterative optimization of the BPNN model parameters, while the validation set was employed to real-time evaluate the generalisation ability of the model during training and avoid overfitting. All measured data were subjected to preprocessing steps, including outlier elimination and feature standardisation, before being used for model training. The key hardware parameters of the system are shown in Table 3.

The channel measurements were carried out at 3.6 GHz using the ZC sequence as the sounding signal. The RX was located at the edge of the farmland in Xuyi, with the antenna at 2.5 m above ground. The measurement scenario is shown in Fig. 5. The UAV carrying the TX took off from one side of the farmland and flew straight at five height levels of 10, 15, 20, 25 and 30 m with an interval of 5 m between adjacent heights, and the flight distance at each height level was 100 m. In total, we obtained 3245 measured path-loss samples across the UAV heights. Channel data were recorded only when the UAV flew along the designated route. Finally, path-loss measurement data for LOS and NLOS scenarios at different flight distances and UAV heights were obtained.

Figure 5: Measurement scenario in the rural farmland of Xuyi.

5.1.2 Experimental Analysis and Performance Comparison

To verify the path loss prediction effectiveness of the channel simulator embedded with our proposed network model, three mainstream wireless channel prediction methods are selected as benchmarks for multi-dimensional performance comparison, including the deterministic method (Ray Tracing), the semi-empirical method (3GPP TR 38.901 model), and the empirical method (CI model). During the experiment, the trained network model is deployed on the channel simulator with channel parameters configured for the farmland scenario, to predict the path loss trend at UAV heights of 15, 20, and 25 m. Meanwhile, 15% of the reserved test set is used as the measured ground truth, and Root Mean Square Error (RMSE) is adopted as the core quantitative indicator to compare the prediction results of each model with the measured data, for quantitative evaluation of the prediction accuracy of different models. The deterministic RT simulation model is implemented based on the MATLAB wireless communication simulation platform, using a two-ray model adapted to the low-altitude farmland scenario, with corrections for vegetation attenuation, ground roughness, and Fresnel reflection coefficient. The core calculation formulas of the CI model and 3GPP TR 38.901 RMa model used in the comparison are shown in Table 4.

The path loss prediction results of different models are shown in Fig. 6. Taking the UAV height of 15 m as an example, the PLE of the CI model fitted by measured data is 2.640, and the standard deviation of Shadow Fading (SF) is 2.407 dB. It can be intuitively seen from the curve fitting that the prediction curve of our proposed model is highly consistent with the measured data of the test set, with prediction accuracy outperforming the RT simulation, CI model, and 3GPP standard model. Further analysis shows that, as a standardized model for general rural macrocellular scenarios, the 3GPP RMa model has insufficient adaptability to the refined environmental features of the specific low-altitude farmland scenario in this work (such as low crop coverage and near-ground reflection characteristics), leading to a certain deviation between prediction results and measured data. Although RT simulation fully considers the physical propagation mechanism of wireless signals, the simplified processing of some scatterers in the scenario by the two-ray model also causes a certain loss of accuracy. In contrast, the prediction results of our proposed model have both compliance with the 3GPP channel standard and accurate adaptability to the specific farmland scenario, and can achieve accurate prediction of path loss in farmland scenarios.

Figure 6: Path loss prediction results of different models at 15 m UAV height.

For UAV heights of 20 and 25 m, the same validation is performed using the 15% reserved test set. The Path Loss Exponents (PLE) of the CI model fitted by measured data at the corresponding heights are 2.789 and 2.759, with the standard deviations of shadow fading (SF) of 2.686 and 2.060 dB, respectively. The results are shown in Fig. 7.

Figure 7: Path loss prediction results of different models at 20 and 25 m UAV height.

The BPNN-based wireless channel simulator deployed on the PL side achieves high consistency between predicted path loss and measured data at the test heights of 20 and 25 m, with prediction accuracy outperforming the traditional CI model, RT simulation, and 3GPP RMa standard model. The traditional CI empirical model requires refitting of core parameters, including the path PLE and standard deviation of SF, with measured data for different UAV flight heights, which limits its scene adaptability and generalization ability. In contrast, the proposed BPNN-based wireless channel simulator in this paper can achieve accurate path loss prediction at all test heights without additional parameter tuning for different flight heights, and its output results are consistent with the measured data of the test set.

The RMSE results of path loss prediction for each model at different UAV heights are shown in Table 5. The proposed model achieves lower RMSE than the CI model, RT simulation, and 3GPP RMa standard model across all test heights, with values of 1.955, 2.223, and 1.972 dB at 15, 20, and 25 m, respectively, indicating better prediction accuracy of the proposed model compared to the benchmark models.

5.2 Small-Scale Fading Generation Using LO-CORDIC Algorithm

5.2.1 Experimental Setup and Parameter Configuration

The objective of this experiment is to validate the accuracy of small-scale fading signal generation, focusing on four representative fading models: Rayleigh, Rice, Nakagami, and Weibull. By comparing the statistical characteristics—probability density function (PDF), mean, and variance—of the generated signals with those of the theoretical models, the effectiveness and reliability of the LO-CORDIC-based small-scale fading generation method are verified, providing experimental support for subsequent wireless channel simulation and hardware implementation. The entire experiment is conducted on the PL side of the channel emulator, with parameter configurations tailored to realistic low-altitude wireless communication scenarios.

The sampling rate is set to 50 MHz, which is consistent with practical low-altitude wireless communication applications and sufficient to capture the rapid fluctuation dynamics of small-scale fading. The maximum Doppler frequency fmaxfmax is set to 80 Hz, employing the Jakes Doppler power spectral density to emulate realistic Doppler spread characteristics. The emulation duration is set to 2 ms, and a total of 2×106 small-scale fading samples are generated. The hardware implementation adopts a 16-bit fixed-point quantization format.

The specific parameter configurations for the four fading models are summarized in Table 6.

During the experiment, we first generate fading samples from the channel emulator, then export them to a host computer and perform statistical analysis using MATLAB software. We compute the PDF, mean, and variance of the samples and compare them against the corresponding theoretical reference values. Each parameter configuration is repeated three times, and we report the average value as the final result to mitigate the influence of random errors from any single trial.

5.2.2 Statistical Validation and Performance Analysis

To quantitatively evaluate the generation accuracy of the LO-CORDIC-based fading emulator, we compare the PDF of the hardware-generated samples against the theoretical PDF curves across all four fading models under multiple parameter configurations. The comparison results are summarized in Fig. 8, where the solid markers represent the hardware-generated PDF values from the channel emulator and the dashed lines denote the corresponding theoretical distributions. The experimental results indicate the following: For Rayleigh fading, the hardware-generated PDFs closely match the theoretical curves across different variance settings, with only minor deviations observed near the distribution tails due to fixed-point quantization effects. For Rice fading, the hardware-generated PDFs accurately capture the characteristic rightward shift of the distribution peak as the Rice factor increases, correctly degenerating to the Rayleigh distribution at low factor values and exhibiting a narrower spread with a higher peak at higher factor values. For Nakagami fading, the hardware-generated PDFs remain consistent with the theoretical distributions across the tested shape factor configurations, displaying features of severe fading at low factor values and a more concentrated distribution at higher factor values. For Weibull fading, the hardware-generated PDFs align closely with the theoretical curves across the shape factor settings, covering different distribution shapes ranging from exponential decay to approximate Rayleigh and symmetric profiles. Overall, the hardware-generated PDFs exhibit strong agreement with the theoretical references across all tested configurations.

Figure 8: Hardware-generated vs. theoretical PDFs of small-scale fading models.

Table 7 summarizes the quantitative error metrics for each fading model, including the mean absolute deviation (MAD) between the hardware-generated PDFs and the theoretical PDFs, as well as the relative errors in mean and variance. Across all configurations, the PDF MAD does not exceed 1.67%, the mean relative error remains within 1.34%, and the variance relative error is at most 2.12%. These results demonstrate that the LO-CORDIC-based channel emulator, operating on the PL side with 16-bit fixed-point arithmetic, can accurately reproduce the statistical properties of all four small-scale fading models, meeting the accuracy requirements for real-time hardware-in-the-loop wireless channel simulation.

5.2.3 Hardware Resource Comparison and Analysis

To evaluate the hardware resource utilization of different fading generation schemes in a multi channel scenario, we provide a quantitative comparison for a 64 channel parallel system in Table 8. The 64 channel configuration corresponds to a typical 4 × 4 MIMO with 4 multipath components per link (16 links × 4 paths = 64 independent fading channels). The proposed LO CORDIC architecture is compared with the high radix CORDIC scheme, the greedy CORDIC scheme, and the conventional look up table based method.

The results show that for a 64 channel parallel system, the proposed LO-CORDIC reduces look-up table resource consumption by 38.3% compared with the high-radix CORDIC scheme, and by 17.7% compared with the greedy CORDIC scheme. Meanwhile, the proposed design consumes zero DSP resources and zero BRAM resources. These characteristics make the LO CORDIC architecture scalable and particularly suitable for resource constrained FPGA platforms, low power hardware implementation scenarios, and massive MIMO channel emulation.

6  Conclusions

This paper presents a hardware-software co-designed UAV A2G channel simulator based on a heterogeneous FPGA PL+PS architecture, enabling high-precision path-loss prediction and low-latency multi-fading generation for low-altitude agricultural communication scenarios. A lightweight BPNN model was constructed using measured channel data, with UAV altitude, propagation distance, and carrier frequency as input features. Deployed on the PS side, the model achieves sub-millisecond real-time inference and delivers higher prediction accuracy than conventional CI, 3GPP, and ray-tracing models. On the PL side, an LO-CORDIC algorithm featuring dynamic angle mapping, local optimal rotation selection, and adaptive iteration termination was designed and implemented. This algorithm efficiently performs trigonometric, exponential, and logarithmic operations required to generate Rayleigh, Rice, and other small-scale fading models. Experimental results on the Xilinx Zynq-7000 SoC platform demonstrate that the LO-CORDIC algorithm reduces the average iteration count by 70.6% compared with the classical CORDIC algorithm, while maintaining an RMSE in path-loss prediction below 2.23 dB. Moreover, the PDF, mean, and variance of the generated fading samples are in strong agreement with theoretical values, with all relative errors within 2.12%. The proposed architecture is well-suited for verifying UAV communication algorithms and evaluating hardware-in-the-loop systems. Future work will extend the simulator to more complex scenarios, such as mountainous and urban environments, and incorporate additional factors, including dynamic vegetation changes and multi-UAV interference.

Acknowledgement: None.

Funding Statement: This research was supported by the Jiangsu Provincial Department of Education Excellent Young Teacher Grant (Qinglan Project); the Nanjing Tech University Pujiang Institute Young Teacher Development Fund; the Nanjing Tech University Pujiang Institute University-Level Research Project (Grant No.: njpj2023-1-04); and the Nanjing University of Aeronautics and Astronautics Visiting Scholar Program.

Author Contributions: The authors confirm contribution to the paper as follows: Conceptualization, Qi Li and Sathish Kumar Selvaperumal; methodology, Qi Li; software, Qi Li; validation, Qi Li and Sathish Kumar Selvaperumal; formal analysis, Qi Li; investigation, Qi Li; resources, Sathish Kumar Selvaperumal; data curation, Qi Li; writing—original draft preparation, Qi Li; writing—review and editing, Qi Li and Sathish Kumar Selvaperumal; visualization, Qi Li; supervision, Sathish Kumar Selvaperumal; project administration, Sathish Kumar Selvaperumal; funding acquisition, Qi Li and Sathish Kumar Selvaperumal. All authors reviewed and approved the final version of the manuscript.

Availability of Data and Materials: The data that support the findings of this study are available from the Corresponding Author, Sathish Kumar Selvaperumal, upon reasonable request.

Ethics Approval: Not applicable.

Conflicts of Interest: The authors declare no conflicts of interest.

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