A Digital Twin-Based Method for Degradation Parameter Identification of Electrolytic Capacitors in Full-Bridge Submodules of Unified Power Flow Controllers

1  Introduction

With the continuous increase in renewable energy grid integration capacity, power systems are exhibiting the “dual-high” characteristics of High Renewable Penetration and High-Power Electronics Penetration [1,2]. The large-scale grid integration of intermittent power sources such as wind and solar energy intensifies power flow fluctuations within the system. FACTS devices (e.g., UPFC) have become critical apparatus for enhancing grid flexibility and stability by dynamically regulating line impedance and voltage phase [3,4]. However, the electrolytic capacitors in the full-bridge submodules of UPFCs, which serve as their core energy storage components, are prone to parameter degradation (increased ESR, decreased C) during long-term operation due to factors such as temperature and voltage stress. This leads to thermal failure of the capacitors [5]. According to statistical investigations, converter failures caused by electrolytic capacitor degradation account for as high as 17.5% of all cases [6]. Consequently, high-accuracy identification of electrolytic capacitor degradation parameters has become a core challenge for the health management of UPFC equipment.

In recent years, methods for identifying degradation parameters of electrolytic capacitors have primarily revolved around physical mechanism modeling and data-driven strategies. The physics-based approaches can be categorized into charge-discharge process analysis and ripple characteristic analysis. The charge-discharge process analysis establishes parameter degradation mapping through dynamic characteristics extraction during capacitor charging/discharging. Reference [7] proposed a Variable Electrical Network (VEN) model enabling joint estimation of capacitance C and ESR via piecewise linearization of charge-discharge curves. Reference [8] developed capacitor degradation models using output voltage ripple data sampled at specific instants, though this method is limited to applications requiring high waveform integrity. Reference [9] introduced a ripple power loss integration method that combines Fourier decomposition to extract fundamental and harmonic components, achieving multi-frequency ESR identification. Traditional physics-based methods face dual technical constraints: (1) Requiring additional sensor components and dedicated sampling circuits; (2) Susceptibility to high-frequency noise interference during parameter identification when capacitor ripples exhibit complex nonlinear characteristics, leading to significant degradation in parameter extraction accuracy.

Compared with physical model-driven strategies, data-driven methods circumvent strong dependence on internal mechanisms through the construction of end-to-end black-box models. Intelligent algorithm-driven approaches demonstrate innovative potential in parameter identification: Reference [10] employed a genetic-particle swarm collaborative optimization algorithm to achieve non-intrusive parameter fitting, effectively avoiding hardware modification costs. Reference [11] innovatively established a nonlinear mapping between ripple voltage characteristics and capacitance values, realizing capacitor parameter estimation via deep feedforward neural networks with output errors constrained within 4%. Reference [12] further proposed a frequency-domain analysis method incorporating time-frequency feature fusion, developing a degradation trajectory prediction model through spectral clustering analysis of operational cycle data, achieving a mean relative error below 3% for capacitance parameters. However, these methods still confront dual technical constraints: (1) Data dependency requiring training databases exceeding 10,000 sample sets; (2) Susceptibility to coupling effects under strong electromagnetic interactions, leading to exponential error growth in multi-target identification and severely limiting practical deployment feasibility.

Digital Twin (DT) technology offers a new approach to overcome the limitations. A defining characteristic of advanced digital twin systems is their ability to intelligently fuse and integrate multiple sources of data and information—including physics-based models, sensor measurements, and operational data—into a cohesive framework [13]. This multi-source data fusion capability enables the digital twin to maintain synchronization with its physical counterpart while providing accurate state estimation and predictive insights. Through this integrated approach combining high-fidelity simulation iteration and real-time data assimilation, DT enables the digital mirroring of degradation parameters of electrolytic capacitors with unprecedented accuracy. Reference [14] proposed a DT-based parameter identification method for MMC half-bridge submodules, achieving parameter identification with errors less than 1%. Reference [15] introduced a gray-box single-phase PWM rectifier modeling and state monitoring method based on DT, which provides the possibility for non-intrusive health status monitoring of rectifier systems and can be used to guide the optimization of control parameters in practical systems. However, existing DT-based methods still face challenges in effectively integrating optimization algorithms with the digital twin framework. The PSO algorithms employed in references [14,15] only optimized the inertia factor, which limits their ability to fully leverage the multi-source data fusion capabilities of the digital twin paradigm. When dealing with complex models and complex objective functions, the insufficient global search and local optimization capabilities of the algorithm become magnified, leading to a significant increase in parameter identification errors. The MMC-UPFC demonstrates superior application potential in FACTS through its multi-modular topology. Nevertheless, its structural complexity and control challenges significantly exceed those of conventional Boost/Buck converters. High-precision DT-based identification of electrolytic capacitor degradation parameters in this device holds critical engineering value for system health monitoring and remaining useful life prediction. However, there is limited research on the application of digital twin technology in MMC-UPFC submodules, and existing studies still exhibit several shortcomings [16–18], These include insufficient specific integration of digital twins with MMC-UPFC systems [16], challenges in online real-time performance and computational efficiency [17], and a lack of multi-parameter fusion mechanisms [18]. Further systematic theoretical exploration and simulation validation are urgently needed. This paper, for the first time, employs a non-invasive identification method based on digital twin to deal with the electrolytic capacitors in the full-bridge submodules of MMC-UPFC and investigates full-bridge submodule electrolytic capacitors in UPFCs through three key innovations: (1) Analysis of degradation mechanisms in full-bridge submodules; (2) Development of a DT modeling framework for UPFC submodules; (3) Formulation of state monitoring objective functions based on aluminum electrolytic capacitor degradation indicators. An improved PSO algorithm was implemented to achieve multi-operational-condition parameter identification, with verification results validating the method’s effectiveness under various scenarios. The aforementioned innovative research will contribute to equipment health management and extend the system lifespan.

2  Degradation Mechanism of Electrolytic Capacitors in UPFC Submodules

Fig. 1 illustrates the MMC-UPFC topology. The series-connected MMC is interfaced with the AC bus through a series transformer, while the shunt-connected MMC is integrated via a shunt transformer. These two MMC subsystems are interconnected through a DC bus in a back-to-back configuration. The MMC employs a cascaded structure where each phase consists of upper and lower arms, with each arm containing multiple cascaded submodules and an arm inductor.

Figure 1: MMC-UPFC topology

The submodule adopts a full-bridge topology as depicted in Fig. 2. The Equivalent Series Inductance (ESL) is neglected due to the operating frequency being far below the resonant frequency of the capacitor.

Figure 2: Full-bridge submodule topology of UPFC

S1, S2, S3, and S4 represent the switching devices, C1 denotes the capacitor in the full-bridge sub-module, and R1 represents its ESR. During MMC operation, all sub-modules exhibit three operational states: When the MMC is in the blocked state, all switching devices (S1–S4) in the sub-modules remain deactivated. When S1 and S4 are turned on while S2 and S3 are turned off, the full-bridge sub-module outputs the capacitor voltage VC (denoted as the “1” level). When S1 and S4 are turned off while S2 and S3 are turned on, the sub-module outputs the negative capacitor voltage −VC (denoted as the “−1” level). If either S1 and S3 are turned on with S2 and S4 turned off, or S1 and S3 are turned off with S2 and S4 turned on, the sub-module capacitor is bypassed, resulting in zero output voltage (denoted as the “0” level).

In existing studies, most sub-modules operate in a traditional mode where:

•   The right bridge arm switches (S3 and S4) are maintained in a fixed state: S3 is constantly off and S4 is constantly on.

•   The left bridge arm switches (S1 and S2) are alternately turned on to enable the sub-module to alternate between the “1” level (positive voltage) and “0” level (bypassed state).

Regardless of whether the MMC operates in steady-state or transient conditions, its sub-modules exclusively transition among these two states.

As established in Reference [19], the switching function S(t) for both upper and lower bridge arms can be mathematically formulated as:

{Sjp==N2−[NMsin⁡(ω1t)2+∑n=2∞Ansin⁡(ωnt)]Sjn==N2+[NMsin⁡(ω1t)2+∑n=2∞Ansin⁡(ωnt)],(1)

here, N denotes the number of submodules, ω1 represents the fundamental angular frequency, and M is the modulation ratio. The terms An and ωn correspond to the amplitude and angular frequency of the n-th harmonic component, respectively. When the submodule count is sufficiently large, higher-order harmonics become negligible. Consequently, the fundamental-frequency averaged switching function for MMC bridge arms can be derived as:

S(t)={1−Msin⁡(ω1t)2=12⏟DC Bias−M02⏟Fundamental ComponentUpper bridge arm1+Msin⁡(ω1t)2=12⏟DC Bias+M02⏟Fundamental ComponentLower bridge arm,(2)

taking the upper arm as a representative case, the capacitor ripple current is calculated based on the switching function S(t):

ic=S(t)⋅iarm(t),(3)

in the equation, iarm(t) denotes the upper arm current. Reference [19] points out that the arm current comprises DC, AC, and circulating current components resulting from instantaneous power imbalance among the three-phase upper and lower arms of the MMC:

iarm(t)≈Idc3−IS2cos⁡(ω1t+φ1)−Iazcos⁡(2ω1t+φ2),(4)

here, Idc denotes the DC current; Is and φ1 represent the amplitude and phase of the AC-side current of the MMC-UPFC, respectively; Iaz and φ2 correspond to the amplitude and phase of the second harmonic of the circulating current.

Thus, we obtain:

ic=S(t)⋅iarm(t)=[12−Msin⁡(ω1t)2]⋅iarm(t)=16Idc−18MIscos⁡(φ1)⏟DC component−16MIdccos⁡(ω1t)+14Issin⁡(ω1t+φ1)−14MIazcos⁡(ω1t+φ2)⏟Fundamental frequency component+18MIscos(2ω1t+φ1)+12Iazsin(2ω1t+φ2)⏟Second harmonic component−14MIazcos⁡(3ω1t+φ2)⏟Third harmonic component,(5)

it can be observed that the capacitor ripple current ic contains DC, fundamental frequency, second-order harmonic, and other higher-order harmonic components. Among these, the second-order harmonic component induced by the arm circulating current predominates [20].

The capacitor ripple current generates Joule heating losses across the equivalent series resistance (ESR) of the capacitor. The instantaneous power loss is given by:

Ploss(t)=ic2(t)⋅ESR(t,T)(6)

where ESR(t, T) represents the equivalent series resistance at time t and temperature T.

The capacitor’s power loss is converted into heat, leading to a temperature rise. According to the resistance-capacitance thermal network model [21], the capacitor core temperature can be represented using a simplified first-order thermal model:

Tc=Ta+Ploss(t)⋅Rth(7)

where Tc is the capacitor core temperature (°C), Ta is the ambient temperature (°C), and Rth is the thermal resistance of the capacitor (°C/W).

Substituting Eq. (6) into Eq. (7) yields:

Tc=Ta+ic2⋅ESR(t,T)⋅Rth(8)

Eq. (8) demonstrates that the capacitor temperature is proportional to the square of the RMS value of the ripple current. Due to the unique characteristics of the MMC, ic contains a significant second-order harmonic component (Eq. (5)). The presence of this second-order harmonic circulating current leads to a substantial increase in capacitor temperature.

The nonlinear aging model for ESR [22] is given by:

1ESR(t,T)=1ESR0⋅[1−k⋅t⋅exp⁡(−EakBTc)](9)

where ESR0 is the equivalent series resistance at the reference temperature T0 (typically the baseline ESR value measured at 25°C), k is a constant dependent on the capacitor’s design and construction, t is the aging time, kB is Boltzmann’s constant, and Ea is the activation energy for electrolyte evaporation. It can be observed that when the temperature continues to rise, the capacitor’s ESR will also increase exponentially, which in turn further aggravates the thermal loss Ploss (Eq. (6)), forming a vicious cycle.

Furthermore, Reference [23] indicates that sustained temperature rise causes electrolyte degradation, resulting in reduced dielectric contact area and consequently decreased capacitance.

However, the capacitance C and ESR determine the key performance characteristics of the aluminum electrolytic capacitors electrolyte. When C drops to 80% of its rated value or the ESR increases to 2–3 times its rated value, the electrolytic capacitor is deemed to have reached the end of its service life [16].

3  Unified Power Flow Controller Submodule Digital Twin Model

The digital twin system modeling methodology integrates both physics-based mechanisms and data-driven approaches, enabling real-time bidirectional data transfer between physical entities and their virtual counterparts. Through iterative parameter training processes, the model dynamically updates its parameters to achieve high-fidelity alignment with the physical system.

3.1 Full-Bridge Submodule Power Circuit

Current research predominantly configures the Full-Bridge Submodule to operate in the conventional mode, where the right-arm switching devices S3 remain permanently off, S4 maintain continuous conduction, while the left-arm devices S1 and S2 operate with complementary switching. This switching sequence enables the submodule to generate alternating positive and zero voltage levels. Consequently, this paper will predominantly analyze this operational methodology.

Through analysis of the commutation path, the following equations can be derived:

{ic=(S1−S3)⋅iarm(t)uo=(S1−S3)⋅(uc+icR1),(10)

where Si represents the switching state of the IGBT; it is assigned a value of 1 when the IGBT is conducting, and 0 otherwise.

Therefore, we obtain:

ducdt=1C1ic=1C1[(S1−S3)⋅iarm(t)](11)

In a complete MMC system, S1, S3, and iarm are all considered known quantities.

The mathematical model of the MMC-UPFC full-bridge submodule can be discretized using the fourth-order Runge-Kutta (RK4) method. As a fourth-order numerical method, RK4 exhibits significantly lower local truncation error and global error compared to lower-order approaches such as the Euler method or improved Euler method. For systems involving rapidly varying dynamics, RK4 demonstrates superior capability in capturing transient characteristics of state variables. Without loss of generality, Eq. (11) can be expressed as:

f(S1,S3,iarm,uc)=f1(t,uc)=ducdt,(12)

the update equations for all state variables in the next sampling period are as follows:

uc,n+1=uc,n+h6(ka1+2ka2+2ka3+ka4),(13)

where h is the computational step size; ka1–ka4 are the computational coefficients, specifically expressed as:

{ka1=f1(t,uc)ka2=f1(t+h2,uc+h2ka1)ka3=f1(t+h2,uc+h2ka2)ka4=f1(t+h,uc+hka3),(14)

the discretized capacitor voltage model can be expressed as:

uc,n+1=fs1(C1,uc,n),(15)

by combining Eq. (10), the following relationship can be derived:

uo,n+1=fs2(C1,R1,uo,n),(16)

from Eq. (16), it can be observed that the established main circuit model contains two unknown parameters, which serve as critical indicators characterizing the health status of electrolytic capacitors and parameter degradation in the UPFC full-bridge submodule.

3.2 Modulation Logic Circuit

The Carrier Phase-Shifted Pulse Width Modulation (CPS-PWM) has gained widespread application due to its superior harmonic characteristics and excellent performance in balancing capacitor voltages. Under the CPS-PWM strategy, the UPFC operates in the conventional operating mode, with the driving signals for all switching devices generated as follows:

S1=S2¯={1,umw>ucw0,umw≤ucw,S3=S4¯=0(17)

in the equation, umw and ucw denote the modulating wave and carrier wave, respectively, where

{umw=M⋅sin⁡(2πfmt+θm)ucm=2πarcsin⁡(sin⁡(2πfct+φk)),(18)

in the equation, fm denotes the modulating wave frequency (typically the fundamental frequency), and θm is the initial phase of the modulating wave; φk represents the phase offset of the k-th carrier wave, satisfying

φk=2π(k−1)N.(19)

4  Digital Twin-Based Parameter Identification

This section presents our digital twin-based approach for parameter identification, which leverages the high-fidelity model described in Section 3.

4.1 Objective Function

In the digital twin model of the full-bridge submodule within the UPFC, the objective function for evaluating model accuracy is defined as:

fobj=1N∑j=1N[(uc,j−ucm,j)2],(20)

in the equation, uc,j denotes the value of uc in the digital twin model; ucm,j represents the sampled values of uc from the actual circuit.

4.2 Model Solving

The accuracy of model parameters constitutes a fundamental criterion for assessing digital twin model efficacy. To develop a high-precision digital twin system, this study employs PSO for parameter identification, capitalizing on its swarm intelligence mechanism that facilitates robust global search capabilities. These capabilities prove particularly critical in capacitor degradation scenarios where non-monotonic variations in ESR and capacitance may emerge due to multi-stress coupling effects [20]. The algorithm’s effectiveness originates from its particle position and velocity update dynamics, as mathematically formalized in Eq. (20), which governs convergence behavior through systematic exploration of parameter spaces. The governing equations of the conventional PSO algorithm are expressed as follows:

vij(k+1)=wvij(k)+c1r1[pij(k)−xij(k)]+c2r2[pgj(k)−xij(k)],(21)

in the governing equations, vij(k), xij(k), and pij(k) represent the velocity vector, position vector, and historical optimal position of the j-th dimension for the i-th particle at the k-th iteration, respectively, while pgj(k) denotes the global historical optimal position of the j-th dimension across the entire swarm. The coefficients w, c1, and c2 correspond to the inertia weight, cognitive learning factor, and social learning factor, respectively, with r1 and r2 being random variables uniformly distributed in [0, 1].

However, this conventional implementation employs manually predetermined coefficients (w, c1, c2), which may compromise algorithmic accuracy and stability due to their fixed nature, often leading to premature convergence to local optima. To address these limitations, an enhanced PSO variant is proposed featuring dynamically adjusted coefficients:

{w=we+(kt−k)(ws−we)ktc1=c1,s+(c1,e−c1,s)k2kt2c2=c2,s+(c2,e−c2,s)k2kt2,(22)

in the equations, ws and we represent the initial and final values of w; c1,s and c1,e denote the initial and final values of c1; c2,s and c2,e are the initial and final values of c2; k and kt indicate the current iteration count and total iteration count, respectively.

Fig. 3 compares the simulated convergence characteristics of the objective function using conventional and enhanced PSO algorithms. The conventional PSO parameters were set as w = 0.9, c1 = 0.5, c2 = 2, while the enhanced PSO employed dynamically adjusted coefficients: ws = 0.9, we = 0.4; c1,s = 2.0, c1,e = 0.5; c2,s = 0.5, c2,e = 2.0. Comparative analysis reveals that although both algorithms achieved convergence within 50 iterations, the enhanced PSO demonstrated superior performance with final convergence values of 0.4076 vs. 0.4689 for the conventional method. This disparity indicates premature convergence to local optima in the conventional approach, whereas the proposed adaptive parameter strategy effectively balances global exploration during initial iterations and local exploitation in later stages, thereby significantly improving optimization accuracy through systematic refinement of search capabilities.

Figure 3: Iterative convergence characteristics of the objective function

5  Model Validation

To validate the accuracy of the proposed digital twin model and the feasibility of the electrolytic capacitor degradation parameter identification method, an MMC system and submodule simulation were first established in PLECS, with simulation parameters listed in Table 1. Based on this foundation, an MMC-UPFC prototype was developed, as shown in Fig. 4. The prototype employs an RTBOX206 microcontroller unit (MCU) from RTU, which features a hybrid architecture integrating a DSP28339 processor with an FPGA. The submodule capacitors are JIANGHAI CD138, and their capacitance values were obtained through offline measurements using an LCR meter. By integrating the prototype, the digital twin model, and the degradation parameter correction method, the MMC-UPFC digital twin system was constructed, as illustrated in Fig. 5. The parameters of the experimental prototype closely match the configuration used in the simulation.

Figure 4: MMC-UPFC prototype photograph

Figure 5: Schematic diagram of digital twin system

To ensure the stable operation of the MMC system used in this study and based on existing empirical knowledge of capacitor aging, the normal operating range for the capacitor parameters was set between 80% and 100% of their nominal values. Considering the impact of monitoring errors, the optimization search range was expanded to 1.5 times the normal operating range to ensure a comprehensive optimization of all key parameters. Furthermore, the optimization time during the proposed degradation parameter identification process was recorded. Using a 5-s segment of external characteristic data as input for iteration, 100 particles required 289.84 s (approximately 5 min) for 20 iterations (Ni = 100, Ti = 20, where Ni represents the number of particles and Ti represents the number of iterations). This represents the maximum time required to complete a single monitoring cycle. Consequently, completing 10 monitoring cycles would require a maximum of approximately 50 min.

It should be noted that this method is suitable for long-term degradation modeling and lifespan estimation. Since the aging and failure process of critical components is a slow and gradual process, where significant changes in degradation parameters typically take months or even years to manifest, the temporal resolution of the proposed method remains acceptable.

Verification of the Twin Model

During the experiments, operational data were acquired through the prototype’s built-in real-time controller and subsequently imported into MATLAB/Simulink for analysis. The key waveforms obtained under rated output power conditions are presented in Fig. 6.

Figure 6: Rated output power test waveforms

The improved PSO algorithm was adopted, with a population size of 100, a maximum iteration count of 100, and parameter settings for the factors extracted from references [24,25].

Figs. 7–9 present a comparative analysis of key voltage and current waveforms from the digital twin model, simulation model, and experimental prototype under three operating conditions with output powers of 8, 4, and 2 kW, respectively. The results demonstrate that both the capacitor voltages and ripple currents of the digital twin model exhibit precise overlap with those of the simulation model and physical prototype without any phase deviation. This close alignment validates the accuracy of the proposed UPFC submodule digital twin framework.

Figure 7: Comparison of submodule output characteristics at 8 kW

Figure 8: Comparison of submodule output characteristics at 4 kW

Figure 9: Comparison of submodule output characteristics at 2 kW

Fig. 10 presents the verification results for different levels of capacitor degradation under the three operating conditions (output powers of 8, 4, and 2 kW). The first set of capacitor parameters was C1 = 2698 μF, R1 = 15.2 mΩ, and the second set was C1 = 2719 μF, R1 = 15.7 mΩ. As shown in Fig. 10, under Po = 8 kW, the average relative errors of the monitored capacitance values were 0.22% and 0.17%, while those for the ESR were 3.02% and 1.27%. Under Po = 4 kW, the average relative errors for capacitance were 0.24% and 0.15%, and for ESR were 2.91% and 1.05%. Under Po = 2 kW, the average relative errors for capacitance were 0.19% and 0.21%, and for ESR were 2.32% and 0.15%. The results demonstrate that across different capacitor degradation levels and output power conditions, the estimated degradation parameters show close agreement with offline measurements. The average relative errors for capacitance monitoring remained within 1.9%, while those for ESR monitoring were within 3.1%.

Figure 10: Digital twin-based monitoring results (Ni = 100, Ti = 20)

Based on references [11–15] and the validation outcomes presented above, this work systematically summarizes the comparative advantages and limitations of the digital twin methodology vs. conventional da-ta-driven approaches and physics-based modeling techniques, as detailed in Table 2.

To further elucidate the superiority of the proposed digital twin methodology in reducing data dependency, this work employs a data-driven approach based on BP neural networks for degradation parameter identification, following the methodology established in reference [9]. Fig. 11 displays the monitoring outcomes under rated output power conditions. Through five equally spaced steps, the capacitance was decreased from 2750 to 2500 μF while the corresponding ESR progressively increased from 13.5 to 16.5 mΩ. The neural network was trained using 1000 ripple voltage measurements per capacitor sample, with 20 samples collected from each capacitance group (totaling 100 samples). These data were divided into training and test sets at an 80:20 ratio. The method ultimately generated estimates for both capacitance and ESR values, which were systematically compared with the digital twin approach proposed in this work. The quantitative comparison results are summarized in Table 3.

Figure 11: Data-driven monitoring results

The results demonstrate that the digital twin method does not require extensive historical data for training and achieves high accuracy in identifying capacitor degradation parameters, thereby fully validating the accuracy and necessity of the digital twin approach proposed in this study.

6  Conclusion

This study established digital twin models for the main circuit, sampling circuit, and modulation circuit of the full-bridge submodule of the UPFC. The state equations of the models were discretized using the RK4 method, enabling the mapping of the physical circuit model into virtual space. The developed model can operate independently and exhibits near-perfect alignment with the outputs of the entity. By solving the model with an improved PSO algorithm, the capacitance and ESR were monitored, leading to the following conclusions:

1.    The proposed degradation parameter identification method effectively and non-invasively monitors the degradation parameters of electrolytic capacitors, with deviations between monitored and measured results remaining below 4%.

2.    The core of this degradation parameter identification method lies in the construction of the digital twin model, which can also be extended to power electronic devices with varying levels of complexity, such as active neutral-point-clamped (ANPC) converters.

3.    Compared to traditional physics-based approaches, the proposed approach, despite its higher computational demand, benefits from the optimized convergence process achieved by the incorporated improved PSO algorithm, thereby making it feasible for quasi-online applications with reasonable computational resources.

4.    Although the prototype described in this paper utilizes only four submodules per single-phase arm (detailed parameters are provided in Table 1), the methodology remains equally applicable to systems with a larger number of submodules, as all submodules share an identical configuration. However, deployment in systems containing a substantially greater number of submodules does introduce certain computational challenges. It should be emphasized that the monitoring of degradation parameters is inherently a long-timescale process; thus, the associated increase in computational time remains acceptable. Furthermore, in practical MMC systems comprising thousands of submodules, computational efficiency can be significantly improved through the adoption of more advanced DSPs and other hardware acceleration measures. Therefore, the scalability of the proposed method is considered fully feasible.

Acknowledgement: This work was supported by the Science and Technology Project of State Grid Jiangsu Electric Power Co., Ltd. (Project No. J2024023): “Research on Submodule-Level Digital Dual-System Online Monitoring and Fault Location Technology for 500 kV UPFC in Southern Jiangsu”. The authors would like to express sincere gratitude to State Grid Suzhou Power Supply Company for providing technical support and practical engineering data for this research. Special thanks are extended to Hohai University for providing research facilities and academic guidance throughout this project. We also appreciate the valuable discussions and suggestions from colleagues at both institutions, which greatly contributed to the completion of this work.

Funding Statement: Project Supported by Science and Technology Project of State Grid Jiangsu Electric Power Company: Research on Submodule-Level Digital Twin-Based Online Monitoring and Fault Location Technology for the 500 kV UPFC in Sunan (J2024023).

Author Contributions: The authors confirm contribution to the paper as follows: conceptualization, Xiaoming Yu, Duicheng Zhao and Jiapeng Shen; methodology, Zhijun Chen; software, Peng Wang and Jun Wang; validation, Ke Zhang and Zhijun Chen; data curation, Xiaoming Yu; writing—original draft preparation, Xiaoming Yu; writing—review and editing, Duicheng Zhao; supervision, Li Zhang and Chuyang Wang; funding acquisition, Peng Wang and Jun Wang. All authors reviewed the results and approved the final version of the manuscript.

Availability of Data and Materials: Data available on request from the authors. The data that support the findings of this study are available from the Corresponding Author, Chuyang Wang, upon reasonable request.

Ethics Approval: Not applicable.

Conflicts of Interest: The authors declare no conflicts of interest to report regarding the present study.

Glossary

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