Open Access

ARTICLE

Study on Heat Transfer in Double-Layer Topologically Optimized Microchannels under Non-Uniform Heat Sources in 2.5D Chips

Yechao Qin¹, Zezhong Hou¹, Xiaojun Dai², Zhenqian Chen¹, Bo Xu^1,*

1 School of Energy and Environment, Southeast University, Nanjing, China
2 Technology and Engineering Center for Space Utilization, Chinese Academy of Sciences, Beijing, China

* Corresponding Author: Bo Xu. Email:

(This article belongs to the Special Issue: Phase Change Heat Transfer in Thermal Management Systems)

Frontiers in Heat and Mass Transfer 2026, 24(3), 2 https://doi.org/10.32604/fhmt.2026.079464

Received 21 January 2026; Accepted 25 March 2026; Issue published 29 June 2026

Abstract

To address the increasing thermal management demands of electronic devices, this study proposes a single-inlet, single-outlet counterflow double-layer microchannel structure optimized for non-uniform heat sources and conducts a numerical analysis. The research focuses on designing a double-layer microchannel structure through topology optimization under 2.5D chip non-uniform heat source conditions. Its heat dissipation performance is compared with traditional linear microchannels to analyze the advantages of the topology-optimized microchannel. In a simulated 2.5D heat source scenario comprising a 240 W logic chip and four 40 W memory chips, the average temperature at the bottom of the topologically optimized microchannel heat sink decreased by 2 to 4 K compared to the conventional design when the inlet Reynolds number ranged from 500 to 2300. Concurrently, the system pressure drop was significantly reduced by 32% to 42%. These results demonstrate that this innovative design offers significant advantages in enhancing cooling efficiency and reducing energy consumption. Furthermore, due to its unique counter-current heat transfer mechanism, the structure also exhibits markedly improved temperature uniformity. This study provides an efficient design solution for advanced electronic thermal management scenarios characterized by constrained design space and stringent requirements for thermal stress management and integration density.

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