M. Geetha1,*, R. Vijayabhasker2, Suresh Seetharaman1
Computer Systems Science and Engineering, Vol.44, No.1, pp. 813-832, 2023, DOI:10.32604/csse.2023.025575
Abstract A basic 7-level MLI topology is developed and the same is extended to the 9-level then further increased to 17-levels. The developed structure minimizes the component’s count and size to draw out the system economy. Despite the various advantages of MLIs, efficiency and reliability play a major role since the usage of components is higher for getting a low Total Harmonics Distortion (THD) value. This becomes a major challenge incorporated in boosting the efficiency without affecting the THD value. Various parametric observations are done and realized for the designed 9-level and 17-level MLI, being the Total Standing Voltage (TSV), efficiency,… More >
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