M. Usman Ashraf1,*, Fathy Alburaei Eassa2, Leon J. Osterweil3, Aiiad Ahmad Albeshri2, Abdullah Algarni2, Iqra Ilyas4
Intelligent Automation & Soft Computing, Vol.30, No.2, pp. 615-639, 2021, DOI:10.32604/iasc.2021.019044
Abstract High Performance Computing (HPC) technologies are emphasizing to increase the system performance across many disciplines. The primary challenge in HPC systems is how to achieve massive performance by minimum power consumption. However, the modern HPC systems are configured by adding the powerful and energy efficient multi-cores/many-cores parallel computing devices such as GPUs, MIC, and FPGA etc. Due to increasing the complexity of one chip many-cores/multi-cores systems, only well-balanced and optimized parallel programming technique is the solution to provide substantial increase in performance under power consumption limitations. Conventionally, the researchers face various barriers while parallelizing their serial code because they don’t… More >
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