Marwa A. Elmenyawi1,2,*, Radwa M. Tawfeek1
Computer Systems Science and Engineering, Vol.46, No.2, pp. 1827-1844, 2023, DOI:10.32604/csse.2023.036474
Abstract One of the elementary operations in computing systems is multiplication. Therefore, high-speed and low-power multipliers design is mandatory for efficient computing systems. In designing low-energy dissipation circuits, reversible logic is more efficient than irreversible logic circuits but at the cost of higher complexity. This paper introduces an efficient signed/unsigned 4 × 4 reversible Vedic multiplier with minimum quantum cost. The Vedic multiplier is considered fast as it generates all partial product and their sum in one step. This paper proposes two reversible Vedic multipliers with optimized quantum cost and garbage output. First, the unsigned Vedic multiplier is designed based on… More >
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