Jungyeon Lee1, Malik Summair Asghar1,2, HyungWon Kim1,*
CMC-Computers, Materials & Continua, Vol.75, No.2, pp. 4357-4375, 2023, DOI:10.32604/cmc.2023.031372
Abstract As deep learning techniques such as Convolutional Neural Networks (CNNs) are widely adopted, the complexity of CNNs is rapidly increasing due to the growing demand for CNN accelerator system-on-chip (SoC). Although conventional CNN accelerators can reduce the computational time of learning and inference tasks, they tend to occupy large chip areas due to many multiply-and-accumulate (MAC) operators when implemented in complex digital circuits, incurring excessive power consumption. To overcome these drawbacks, this work implements an analog convolutional filter consisting of an analog multiply-and-accumulate arithmetic circuit along with an analog-to-digital converter (ADC). This paper introduces the architecture of an analog convolutional… More >
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