Arpit Jain1, Rakesh Kumar Dwivedi1, Hammam Alshazly2,*, Adesh Kumar3, Sami Bourouis4, Manjit Kaur5
CMC-Computers, Materials & Continua, Vol.71, No.2, pp. 4085-4100, 2022, DOI:10.32604/cmc.2022.023017
Abstract The network-on-chip (NoC) technology is frequently referred to as a front-end solution to a back-end problem. The physical substructure that transfers data on the chip and ensures the quality of service begins to collapse when the size of semiconductor transistor dimensions shrinks and growing numbers of intellectual property (IP) blocks working together are integrated into a chip. The system on chip (SoC) architecture of today is so complex that not utilizing the crossbar and traditional hierarchical bus architecture. NoC connectivity reduces the amount of hardware required for routing and functions, allowing SoCs with NoC interconnect fabrics to operate at higher… More >
Login
Register
