Pengcheng Liu1, †, Xiaojun Wang1, †, S. R. Chaudhry1, Khalid Javeed2, Yue Ma3, *, Martin Collier1
CMC-Computers, Materials & Continua, Vol.57, No.3, pp. 353-363, 2018, DOI:10.32604/cmc.2018.04142
Abstract The combination of traditional processors and Field Programmable Gate Arrays (FPGA) is shaping the future networking platform for intensive computation in resource-constrained networks and devices. These networks present two key challenges of security and resource limitations. Lightweight ciphers are suitable to provide data security in such constrained environments. Implementing the lightweight PRESENT encryption algorithm in a reconfigurable platform (FPGAs) can offer secure communication service and flexibility. This paper presents hardware acceleration of security primitives in SDN using NETFPGA-10G. We implement an efficient design of the PRESENT algorithm for faster, smaller and lower power consumption hardware More >
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