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  • Open Access


    NURBS Modeling and Curve Interpolation Optimization of 3D Graphics

    Hao Zhu1,*, Mulan Wang2, Kun Liu2, Weiye Xu3

    CMC-Computers, Materials & Continua, Vol.66, No.2, pp. 1799-1811, 2021, DOI:10.32604/cmc.2020.012706

    Abstract In order to solve the problem of complicated Non-Uniform Rational B-Splines (NURBS) modeling and improve the real-time performance of the high-order derivative of the curve interpolation process, the method of NURBS modeling based on the slicing and layering of triangular mesh is introduced. The research and design of NURBS curve interpolation are carried out from the two aspects of software algorithm and hardware structure. Based on the analysis of the characteristics of traditional computing methods with Taylor series expansion, the Adams formula and the Runge-Kutta formula are used in the NURBS curve interpolation process, and the process is then optimized… More >

  • Open Access


    Enhanced Portable LUT Multiplier with Gated Power Optimization for Biomedical Therapeutic Devices

    Praveena R1, *

    CMC-Computers, Materials & Continua, Vol.63, No.1, pp. 85-95, 2020, DOI:10.32604/cmc.2020.08629

    Abstract Digital design of a digital signal processor involves accurate and high-speed mathematical computation units. DSP units are one of the most power consuming and memory occupying devices. Multipliers are the common building blocks in most of the DSP units which demands low power and area constraints in the field of portable biomedical devices. This research works attempts multiple power reduction technique to limit the power dissipation of the proposed LUT multiplier unit. A lookup table-based multiplier has the advantage of almost constant area requirement’s irrespective to the increase in bit size of multiplier. Clock gating is usually used to reduce… More >

  • Open Access


    Retraction Notice to: Implementation System of Human Eye Tracking Algorithm Based on FPGA

    Zhong Liu1, 2, Xin’an Wang1, Chengjun Sun1, Ken Lu3

    CMC-Computers, Materials & Continua, Vol.62, No.3, pp. 1487-1487, 2020, DOI:10.32604/cmc.2020.04597

    Abstract This article has no abstract. More >

  • Open Access


    High Speed Network Intrusion Detection System (NIDS) Using Low Power Precomputation Based Content Addressable Memory

    R. Mythili1, *, P. Kalpana2

    CMC-Computers, Materials & Continua, Vol.62, No.3, pp. 1097-1107, 2020, DOI:10.32604/cmc.2020.08396

    Abstract NIDS (Network Intrusion Detection Systems) plays a vital role in security threats to computers and networks. With the onset of gigabit networks, hardware-based Intrusion Detection System gains popularity because of its high performance when compared to the software-based NIDS. The software-based system limits parallel execution, which in turn confines the performance of a modern network. This paper presents a signature-based lookup technique using reconfigurable hardware. Content Addressable Memory (CAM) is used as a lookup table architecture to improve the speed instead of search algorithms. To minimize the power and to increase the speed, precomputation based CAM (PBCAM) can be used,… More >

  • Open Access


    Hardware Circuit Implementation and Performance Analysis of Three-Slot NP-CSMA

    Xu Lu1, Hongwei Ding1,*, Zejun Han1, Zhijun Yang1, Liqing Wang1, Liyong Bao1

    CMES-Computer Modeling in Engineering & Sciences, Vol.119, No.3, pp. 639-658, 2019, DOI:10.32604/cmes.2019.04813

    Abstract The development of wireless communication technology has become increasingly important in the communications industry. How to allocate limited channel resources reasonably and reliably to each competing user is a problem that the access protocol of the MAC (Multiple Access Control) layer needs to solve. As an important way of random access, NP-CSMA (Non Persistent Carrier Sense Multiple Access) has a higher network throughput rate when the arrival rate is higher. This paper analyzes and improves the implemented NP-CSMA model, and obtains a three-slot NP-CSMA model. The mathematical tool MATLAB is used to analyze the network throughput, delay and energy efficiency… More >

  • Open Access


    RETRACTED: Implementation System of Human Eye Tracking Algorithm Based on FPGA

    Zhong Liu1,2, Xin’an Wang1, Chengjun Sun1, Ken Lu3

    CMC-Computers, Materials & Continua, Vol.58, No.3, pp. 653-664, 2019, DOI:10.32604/cmc.2019.04597

    Abstract With the high-speed development of transportation industry, highway traffic safety has become a considerable problem. Meanwhile, with the development of embedded system and hardware chip, in recent years, human eye detection eye tracking and positioning technology have been more and more widely used in man-machine interaction, security access control and visual detection.
    In this paper, the high parallelism of FPGA was utilized to realize an elliptical approximate real-time human eye tracking system, which was achieved by the series register structure and random sample consensus (RANSAC), thus improving the speed of image processing without using external memory. Because eye images acquired by… More >

  • Open Access


    Secure Video Streaming with Lightweight Cipher PRESENT in an SDN Testbed

    Pengcheng Liu1, †, Xiaojun Wang1, †, S. R. Chaudhry1, Khalid Javeed2, Yue Ma3, *, Martin Collier1

    CMC-Computers, Materials & Continua, Vol.57, No.3, pp. 353-363, 2018, DOI:10.32604/cmc.2018.04142

    Abstract The combination of traditional processors and Field Programmable Gate Arrays (FPGA) is shaping the future networking platform for intensive computation in resource-constrained networks and devices. These networks present two key challenges of security and resource limitations. Lightweight ciphers are suitable to provide data security in such constrained environments. Implementing the lightweight PRESENT encryption algorithm in a reconfigurable platform (FPGAs) can offer secure communication service and flexibility. This paper presents hardware acceleration of security primitives in SDN using NETFPGA-10G. We implement an efficient design of the PRESENT algorithm for faster, smaller and lower power consumption hardware circuit using Verilog. We evaluate… More >

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