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  • Open Access

    ARTICLE

    A Flexible Architecture for Cryptographic Applications: ECC and PRESENT

    Muhammad Rashid1,*, Omar S. Sonbul1, Muhammad Arif2, Furqan Aziz Qureshi3, Saud. S. Alotaibi4, Mohammad H. Sinky1

    CMC-Computers, Materials & Continua, Vol.76, No.1, pp. 1009-1025, 2023, DOI:10.32604/cmc.2023.039901

    Abstract This work presents a flexible/unified hardware architecture of Elliptic-curve Cryptography (ECC) and PRESENT for cryptographic applications. The features of the proposed work are (i) computation of only the point multiplication operation of ECC over for a 163-bit key generation, (ii) execution of only the variant of an 80-bit PRESENT block cipher for data encryption & decryption and (iii) execution of point multiplication operation (ECC algorithm) along with the data encryption and decryption (PRESENT algorithm). To establish an area overhead for the flexible design, dedicated hardware architectures of ECC and PRESENT are implemented in the first step, and a sum of… More >

  • Open Access

    ARTICLE

    A Speech Cryptosystem Using the New Chaotic System with a Capsule-Shaped Equilibrium Curve

    Mohamad Afendee Mohamed1, Talal Bonny2, Aceng Sambas3, Sundarapandian Vaidyanathan4, Wafaa Al Nassan2, Sen Zhang5, Khaled Obaideen2, Mustafa Mamat1, Mohd Kamal Mohd Nawawi6,*

    CMC-Computers, Materials & Continua, Vol.75, No.3, pp. 5987-6006, 2023, DOI:10.32604/cmc.2023.035668

    Abstract In recent years, there are numerous studies on chaotic systems with special equilibrium curves having various shapes such as circle, butterfly, heart and apple. This paper describes a new 3-D chaotic dynamical system with a capsule-shaped equilibrium curve. The proposed chaotic system has two quadratic, two cubic and two quartic nonlinear terms. It is noted that the proposed chaotic system has a hidden attractor since it has an infinite number of equilibrium points. It is also established that the proposed chaotic system exhibits multi-stability with two coexisting chaotic attractors for the same parameter values but differential initial states. A detailed… More >

  • Open Access

    ARTICLE

    High Efficient Reconfigurable and Self Testable Architecture for Sensor Node

    G. Venkatesan1,*, N. Ramadass2

    Computer Systems Science and Engineering, Vol.46, No.3, pp. 3979-3991, 2023, DOI:10.32604/csse.2023.031627

    Abstract Sensor networks are regularly sent to monitor certain physical properties that run in length from divisions of a second to many months or indeed several years. Nodes must advance their energy use for expanding network lifetime. The fault detection of the network node is very significant for guaranteeing the correctness of monitoring results. Due to different network resource constraints and malicious attacks, security assurance in wireless sensor networks has been a difficult task. The implementation of these features requires larger space due to distributed module. This research work proposes new sensor node architecture integrated with a self-testing core and cryptoprocessor… More >

  • Open Access

    ARTICLE

    A Coprocessor Architecture for 80/112-bit Security Related Applications

    Muhammad Rashid*, Majid Alotaibi

    CMC-Computers, Materials & Continua, Vol.74, No.3, pp. 6849-6865, 2023, DOI:10.32604/cmc.2023.032849

    Abstract We have proposed a flexible coprocessor key-authentication architecture for 80/112-bit security-related applications over field by employing Elliptic-curve Diffie Hellman (ECDH) protocol. Towards flexibility, a serial input/output interface is used to load/produce secret, public, and shared keys sequentially. Moreover, to reduce the hardware resources and to achieve a reasonable time for cryptographic computations, we have proposed a finite field digit-serial multiplier architecture using combined shift and accumulate techniques. Furthermore, two finite-state-machine controllers are used to perform efficient control functionalities. The proposed coprocessor architecture over and is programmed using Verilog and then implemented on Xilinx Virtex-7 FPGA (field-programmable-gate-array) device. For and ,… More >

  • Open Access

    ARTICLE

    A Universal BIST Approach for Virtex-Ultrascale Architecture

    N. Sathiabama1,*, S. Anila2

    Computer Systems Science and Engineering, Vol.45, No.3, pp. 2705-2720, 2023, DOI:10.32604/csse.2023.025941

    Abstract Interconnected cells, Configurable Logic Blocks (CLBs), and input/output (I/O) pads are all present in every Field Programmable Gate Array (FPGA) structure. The interconnects are formed by the physical paths for connecting the blocks . The combinational and sequential circuits are used in the logic blocks to execute logical functions. The FPGA includes two different tests called interconnect testing and logical testing. Instead of using an additional circuitry, the Built-in-Self-Test (BIST) logic is coded into an FPGA, which is then reconfigured to perform its specific operation after the testing is completed. As a result, additional test circuits for the FPGA board… More >

  • Open Access

    ARTICLE

    FPGA Implementation of Extended Kalman Filter for Parameters Estimation of Railway Wheelset

    Khakoo Mal1,2,*, Tayab Din Memon1,3, Imtiaz Hussain Kalwar4, Bhawani Shankar Chowdhry5

    CMC-Computers, Materials & Continua, Vol.74, No.2, pp. 3351-3370, 2023, DOI:10.32604/cmc.2023.032940

    Abstract It is necessary to know the status of adhesion conditions between wheel and rail for efficient accelerating and decelerating of railroad vehicle. The proper estimation of adhesion conditions and their real-time implementation is considered a challenge for scholars. In this paper, the development of simulation model of extended Kalman filter (EKF) in MATLAB/Simulink is presented to estimate various railway wheelset parameters in different contact conditions of track. Due to concurrent in nature, the Xilinx® System-on-Chip Zynq Field Programmable Gate Array (FPGA) device is chosen to check the onboard estimation of wheel-rail interaction parameters by using the National Instruments (NI) myRIO®More >

  • Open Access

    ARTICLE

    Efficient Hardware Design of a Secure Cancellable Biometric Cryptosystem

    Lamiaa A. Abou Elazm1,2, Walid El-Shafai3,4, Sameh Ibrahim2, Mohamed G. Egila1, H. Shawkey1, Mohamed K. H. Elsaid2, Naglaa F. Soliman5, Hussah Nasser AlEisa6,*, Fathi E. Abd El-Samie3

    Intelligent Automation & Soft Computing, Vol.36, No.1, pp. 929-955, 2023, DOI:10.32604/iasc.2023.031386

    Abstract Biometric security is a growing trend, as it supports the authentication of persons using confidential biometric data. Most of the transmitted data in multimedia systems are susceptible to attacks, which affect the security of these systems. Biometric systems provide sufficient protection and privacy for users. The recently-introduced cancellable biometric recognition systems have not been investigated in the presence of different types of attacks. In addition, they have not been studied on different and large biometric datasets. Another point that deserves consideration is the hardware implementation of cancellable biometric recognition systems. This paper presents a suggested hybrid cancellable biometric recognition system… More >

  • Open Access

    ARTICLE

    A Secure Hardware Implementation for Elliptic Curve Digital Signature Algorithm

    Mouna Bedoui1,*, Belgacem Bouallegue1,2, Abdelmoty M. Ahmed2, Belgacem Hamdi1,3, Mohsen Machhout1, Mahmoud1, M. Khattab2

    Computer Systems Science and Engineering, Vol.44, No.3, pp. 2177-2193, 2023, DOI:10.32604/csse.2023.026516

    Abstract Since the end of the 1990s, cryptosystems implemented on smart cards have had to deal with two main categories of attacks: side-channel attacks and fault injection attacks. Countermeasures have been developed and validated against these two types of attacks, taking into account a well-defined attacker model. This work focuses on small vulnerabilities and countermeasures related to the Elliptic Curve Digital Signature Algorithm (ECDSA) algorithm. The work done in this paper focuses on protecting the ECDSA algorithm against fault-injection attacks. More precisely, we are interested in the countermeasures of scalar multiplication in the body of the elliptic curves to protect against… More >

  • Open Access

    ARTICLE

    Implementation of FPGA Based MPPT Techniques for Grid-Connected PV System

    Thamatapu Eswara Rao*, S. Elango

    Intelligent Automation & Soft Computing, Vol.35, No.2, pp. 1783-1798, 2023, DOI:10.32604/iasc.2023.028835

    Abstract Global energy demand is growing rapidly owing to industrial growth and urbanization. Alternative energy sources are driven by limited reserves and rapid depletion of conventional energy sources (e.g., fossil fuels).Solar photovoltaic (PV), as a source of electricity, has grown in popularity over the last few decades because of their clean, noise-free, low-maintenance, and abundant availability of solar energy. There are two types of maximum power point tracking (MPPT) techniques: classical and evolutionary algorithm-based techniques. Precise and less complex perturb and observe (P&O) and incremental conductance (INC) approaches are extensively employed among classical techniques. This study used a field-programmable gate array… More >

  • Open Access

    ARTICLE

    Medical Image Demosaicing Based Design of Newton Gregory Interpolation Algorithm

    E. P. Kannan1,*, S. S. Vinsley2, T. V. Chithra3

    Intelligent Automation & Soft Computing, Vol.34, No.3, pp. 1675-1691, 2022, DOI:10.32604/iasc.2022.022707

    Abstract In this paper, Field-Programmable Gate Array (FPGA) implementation-based image demosaicing is carried out. The Newton Gregory interpolation algorithm is designed based on FPGA frame work. Interpolation is the method of assessing the value of a function for any in-between value of self-regulating variable, whereas the method of computing the value of the function outside the specified range is named extrapolation. The natural images are collected from Kodak image database and medical images are collected from UPOL (University of Phoenix Online) database. The proposed algorithm is executed on using Xilinx ISE (Integrated Synthesis Environment) Design Suite 14.2 and is confirmed on… More >

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