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  • Open Access

    ARTICLE

    A Speech Cryptosystem Using the New Chaotic System with a Capsule-Shaped Equilibrium Curve

    Mohamad Afendee Mohamed1, Talal Bonny2, Aceng Sambas3, Sundarapandian Vaidyanathan4, Wafaa Al Nassan2, Sen Zhang5, Khaled Obaideen2, Mustafa Mamat1, Mohd Kamal Mohd Nawawi6,*

    CMC-Computers, Materials & Continua, Vol.75, No.3, pp. 5987-6006, 2023, DOI:10.32604/cmc.2023.035668

    Abstract In recent years, there are numerous studies on chaotic systems with special equilibrium curves having various shapes such as circle, butterfly, heart and apple. This paper describes a new 3-D chaotic dynamical system with a capsule-shaped equilibrium curve. The proposed chaotic system has two quadratic, two cubic and two quartic nonlinear terms. It is noted that the proposed chaotic system has a hidden attractor since it has an infinite number of equilibrium points. It is also established that the proposed chaotic system exhibits multi-stability with two coexisting chaotic attractors for the same parameter values but differential initial states. A detailed… More >

  • Open Access

    ARTICLE

    An FPGA Design for Real-Time Image Denoising

    Ahmed Ben Atitallah*

    Computer Systems Science and Engineering, Vol.43, No.2, pp. 803-816, 2022, DOI:10.32604/csse.2022.024393

    Abstract The increasing use of images in miscellaneous applications such as medical image analysis and visual quality inspection has led to growing interest in image processing. However, images are often contaminated with noise which may corrupt any of the following image processing steps. Therefore, noise filtering is often a necessary preprocessing step for the most image processing applications. Thus, in this paper an optimized field-programmable gate array (FPGA) design is proposed to implement the adaptive vector directional distance filter (AVDDF) in hardware/software (HW/SW) codesign context for removing noise from the images in real-time. For that, the high-level synthesis (HLS) flow is… More >

  • Open Access

    ARTICLE

    Unified FPGA Design for the HEVC Dequantization and Inverse Transform Modules

    Turki M. Alanazi, Ahmed Ben Atitallah*

    CMC-Computers, Materials & Continua, Vol.71, No.3, pp. 4319-4335, 2022, DOI:10.32604/cmc.2022.022988

    Abstract As the newest standard, the High Efficiency Video Coding (HEVC) is specially designed to minimize the bitrate for video data transfer and to support High Definition (HD) and ULTRA HD video resolutions at the cost of increasing computational complexity relative to earlier standards like the H.264. Therefore, real-time video decoding with HEVC decoder becomes a challenging task. However, the Dequantization and Inverse Transform (DE/IT) are one of the computationally intensive modules in the HEVC decoder which are used to reconstruct the residual block. Thus, in this paper, a unified hardware architecture is proposed to implement the HEVC DE/IT module for… More >

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