Shujuan Tian^1,2,3, Wenjian Ding^1,2,3, Gang Liu⁴, Yuxia Sun⁵, Saiqin Long⁵, Jiang Zhu^1,2,3,*

CMC-Computers, Materials & Continua, Vol.75, No.1, pp. 373-391, 2023, DOI:10.32604/cmc.2023.034770

Abstract In edge computing, a reasonable edge resource bidding mechanism can enable edge providers and users to obtain benefits in a relatively fair fashion. To maximize such benefits, this paper proposes a dynamic multi-attribute resource bidding mechanism (DMRBM). Most of the previous work mainly relies on a third-party agent to exchange information to gain optimal benefits. It is worth noting that when edge providers and users trade with third-party agents which are not entirely reliable and trustworthy, their sensitive information is prone to be leaked. Moreover, the privacy protection of edge providers and users must be considered in the dynamic pricing/transaction… More >

Nagarajan Shanmugam^*, Vijeyakumar Krishnasamy Natarajan, Kalaiselvi Sundaram, Saravanakumar Natarajan

Computer Systems Science and Engineering, Vol.42, No.2, pp. 619-638, 2022, DOI:10.32604/csse.2022.021008

Abstract In the recent years, error recovery circuits in optimized data path units are adopted with approximate computing methodology. In this paper the novel multipliers have effective utilization in the newly proposed two different 4:2 approximate compressors that generate Error free Sum (ES) and Error free Carry (EC). Proposed ES and Proposed EC in 4:2 compressors are used for performing Partial Product (PP) compression. The structural arrangement utilizes Dadda structure based PP. Due to the regularity of PP arrangement Dadda multiplier is chosen for compressor implementation that favors easy standard cell ASIC design. In this, the proposed compression idealogy are more… More >

B. Sakthivel^1,*, K. Jayaram², N. Manikanda Devarajan³, S. Mahaboob Basha⁴, S. Rajapriya⁵

Computer Systems Science and Engineering, Vol.42, No.1, pp. 397-406, 2022, DOI:10.32604/csse.2022.021637

Abstract Approximate Computing is a low power achieving technique that offers an additional degree of freedom to design digital circuits. Pruning is one of the types of approximate circuit design technique which removes logic gates or wires in the circuit to reduce power consumption with minimal insertion of error. In this work, a novel machine learning (ML) -based pruning technique is introduced to design digital circuits. The machine-learning algorithm of the random forest decision tree is used to prune nodes selectively based on their input pattern. In addition, an error compensation value is added to the original output to reduce an… More >

K. N. Vijeyakumar¹, S. Maragatharaj^2,*

CMC-Computers, Materials & Continua, Vol.70, No.2, pp. 2543-2561, 2022, DOI:10.32604/cmc.2022.019789

Abstract Approximate computing has received significant attention in the design of portable CMOS hardware for error-tolerant applications. This work proposes an approximate adder that to optimize area delay and achieve energy efficiency using Parallel Carry (PC) generation logic. For ‘n’ bits in input, the proposed algorithm use approximate addition for least n/2 significant bits and exact addition for most n/2 significant bits. A simple OR logic with no carry propagation is used to implement the approximate part. In the exact part, addition is performed using 4-bit adder blocks that implement PC at block level to reduce node capacitance in the critical… More >