N. Manikanda Devarajan^1,*, S. Thenmozhi², K. Jayaram³, R. Saravanakumar⁴

Intelligent Automation & Soft Computing, Vol.32, No.2, pp. 1167-1178, 2022, DOI:10.32604/iasc.2022.021558 - 17 November 2021

Abstract Orthogonal Frequency Division Multiplexing (OFDM) is a wireless communication technology that is used for highly reliable and high data rate communication. In a multi-user OFDM system, the interference has occurred in the receiver side between the consecutive OFDM symbols. This interference reduces the performance of the OFDM system. To achieve good quality in received symbols the interference level should be minimized. The conventional cancellation system requires higher interference reduction time and power. These limitations of the conventional interference cancellation architectures for OFDM systems are overcome by proposing efficient and low power interference cancellation architecture. Hence,… More >

Hassen Mestiri^1,2,3,*, Imen Barraj^4,5, Abdullah Alsir Mohamed¹, Mohsen Machhout³

CMC-Computers, Materials & Continua, Vol.70, No.2, pp. 3667-3683, 2022, DOI:10.32604/cmc.2022.020716 - 27 September 2021

Abstract The Advanced Encryption Standard cryptographic algorithm, named AES, is implemented in cryptographic circuits to ensure high security level to any system which required confidentiality and secure information exchange. One of the most effective physical attacks against the hardware implementation of AES is fault attacks which can extract secret data. Until now, a several AES fault detection schemes against fault injection attacks have been proposed. In this paper, so as to ensure a high level of security against fault injection attacks, a new efficient fault detection scheme based on the AES architecture modification has been proposed.… More >

Namit Gupta^1,*, Kunwar Singh Vaisla², Arpit Jain³, Adesh Kumar⁴, Rajeev Kumar³

Computer Systems Science and Engineering, Vol.40, No.3, pp. 1073-1084, 2022, DOI:10.32604/csse.2022.019911 - 24 September 2021

Abstract Wireless sensor network (WSN) is a group of interconnected sensor nodes that work wirelessly to capture the information of surroundings. The routing of the network is a challenging task. The routing of WSN is classified as proactive, reactive, and hybrid. Adhoc on-demand distance vector (AODV) routing is an example of reactive routing based on the demand route formations among different nodes in the network. The research article emphasizes the design and simulation of the AODV routing hardware chip using very-high-speed integrated circuit hardware description language (VHDL) programming in Xilinx integrated synthesis environment (ISE) 14.7 software. More >

Amit Kumar¹, Adesh Kumar^2,*, Geetam Singh Tomar³

Computer Systems Science and Engineering, Vol.40, No.2, pp. 645-659, 2022, DOI:10.32604/csse.2022.019449 - 09 September 2021

Abstract The fourth-generation (4G) and fifth-generation (5G) wireless communication systems use the orthogonal frequency division multiplexing (OFDM) modulation techniques and subcarrier allocations. The OFDM modulator and demodulator have inverse fast Fourier transform (IFFT) and fast Fourier transform (FFT) respectively. The biggest challenge in IFFT/FFT processor is the computation of imaginary and real values. CORDIC has been proved one of the best rotation algorithms for logarithmic, trigonometric, and complex calculations. The proposed work focuses on the OFDM transceiver hardware chip implementation, in which 8-point to 1024-point IFFT and FFT are used to compute the operations in transmitter… More >

Praveenkumar Babu, Eswaran Parthasarathy^*

Intelligent Automation & Soft Computing, Vol.30, No.3, pp. 1063-1071, 2021, DOI:10.32604/iasc.2021.018903 - 20 August 2021

Abstract Advancements in image and video processing are growing over the years for industrial robots, autonomous vehicles, indexing databases, surveillance, medical imaging and computer-human interaction applications. One of the major challenges in real-time image and video processing is the execution of complex functions and high computational tasks. In this paper, the hardware acceleration of different filter algorithms for both image and video processing is implemented on Xilinx Zynq^®-7000 System on-Chip (SoC) device. It consists of Dual-core Cortex^™-A9 processors which provide computing ability to perform I/O and processing functions and software libraries using Vivado^® High-Level Synthesis (HLS). In the More >

Huan Zhang^1,2, Jiliu Zhou^1,2,*, Xi Wu²

CMES-Computer Modeling in Engineering & Sciences, Vol.127, No.3, pp. 1151-1175, 2021, DOI:10.32604/cmes.2021.015462 - 24 May 2021

Abstract In hardware Trojan detection technology, destructive reverse engineering can restore an original integrated circuit with the highest accuracy. However, this method has a much higher overhead in terms of time, effort, and cost than bypass detection. This study proposes an algorithm, called mixed-feature gene expression programming, which applies non-destructive reverse engineering to the chip with bypass detection data. It aims to recover the original integrated circuit hardware, or else reveal the unknown circuit design in the chip. More >

Songchen Wang, Xinmei Li^*, Cheng Chai, Gen Wang, Caibin Lu

FDMP-Fluid Dynamics & Materials Processing, Vol.17, No.3, pp. 653-666, 2021, DOI:10.32604/fdmp.2021.015127 - 29 April 2021

Abstract The interaction of U-shaped rings used for power transmission hardware with a wind-sand field is simulated numerically. A standard turbulence model is used in synergy with an Eulerian-Lagrangian approach. The results show that the wind pressure on the windward side of the U-shaped ring is the highest, a negative pressure zone appears on both sides of the U-shaped ring, while a Kármán Vortex Street is created on its leeward side. There are three possible regimes of motion for the sand grains in the wind field. Sand grains with size below 0.125 mm can follow the More >

T. Kowsalya¹, R. Ganesh Babu², B. D. Parameshachari³, Anand Nayyar⁴, Raja Majid Mehmood^5,*

CMC-Computers, Materials & Continua, Vol.68, No.2, pp. 1447-1465, 2021, DOI:10.32604/cmc.2021.014606 - 13 April 2021

Abstract Lightweight Cryptography (LWC) is widely used to provide integrity, secrecy and authentication for the sensitive applications. However, the LWC is vulnerable to various constraints such as high-power consumption, time consumption, and hardware utilization and susceptible to the malicious attackers. In order to overcome this, a lightweight block cipher namely PRESENT architecture is proposed to provide the security against malicious attacks. The True Random Number Generator-Pseudo Random Number Generator (TRNG-PRNG) based key generation is proposed to generate the unpredictable keys, being highly difficult to predict by the hackers. Moreover, the hardware utilization of PRESENT architecture is… More >

Wajdi Alhakami¹, Abdullah Baz², Hosam Alhakami³, Masood Ahmad⁴, Raees Ahmad Khan^4,*

Intelligent Automation & Soft Computing, Vol.27, No.2, pp. 409-424, 2021, DOI:10.32604/iasc.2021.015351 - 18 January 2021

Abstract Healthcare devices play an essential role in tracking and managing patient’s safety. However, the complexities of healthcare devices often remain ambiguous due to hardware, software, or the interoperable healthcare system problems. There are essentially two critical factors for targeting healthcare: First, healthcare data is the most valuable entity on the dark web; and the second, it is the easiest to hack. Data pilferage has become a major hazard for healthcare organizations as the hackers now demand ransom and threaten to disclose the sensitive data if not paid within the stipulated timeline. The present study enlists More >

Yunping Zhao, Jianzhuang Lu^*, Xiaowen Chen

CMC-Computers, Materials & Continua, Vol.66, No.1, pp. 517-535, 2021, DOI:10.32604/cmc.2020.012380 - 30 October 2020

Abstract Convolutional Neural Networks (CNNs) are widely used in many fields. Due to their high throughput and high level of computing characteristics, however, an increasing number of researchers are focusing on how to improve the computational efficiency, hardware utilization, or flexibility of CNN hardware accelerators. Accordingly, this paper proposes a dynamically reconfigurable accelerator architecture that implements a Sparse-Winograd F(2 2.3 3)-based high-parallelism hardware architecture. This approach not only eliminates the pre-calculation complexity associated with the Winograd algorithm, thereby reducing the difficulty of hardware implementation, but also greatly improves the flexibility of the hardware; as a result, More >