Ayoub Mhaouch^1,*, Wafa Gtifa², Turke Althobaiti³, Hamzah Faraj⁴, Mohsen Machhout¹

CMC-Computers, Materials & Continua, Vol.84, No.3, pp. 5637-5663, 2025, DOI:10.32604/cmc.2025.065525 - 30 July 2025

Abstract In medical imaging, accurate brain tumor classification in medical imaging requires real-time processing and efficient computation, making hardware acceleration essential. Field Programmable Gate Arrays (FPGAs) offer parallelism and reconfigurability, making them well-suited for such tasks. In this study, we propose a hardware-accelerated Convolutional Neural Network (CNN) for brain cancer classification, implemented on the PYNQ-Z2 FPGA. Our approach optimizes the first Conv2D layer using different numerical representations: 8-bit fixed-point (INT8), 16-bit fixed-point (FP16), and 32-bit fixed-point (FP32), while the remaining layers run on an ARM Cortex-A9 processor. Experimental results demonstrate that FPGA acceleration significantly outperforms the… More >

Jingya Feng¹, Ying Zhao^2,*, Tao Ye¹, Wei Feng^3,*

CMC-Computers, Materials & Continua, Vol.83, No.1, pp. 1491-1507, 2025, DOI:10.32604/cmc.2025.059882 - 26 March 2025

Abstract The efficient implementation of the Advanced Encryption Standard (AES) is crucial for network data security. This paper presents novel hardware implementations of the AES S-box, a core component, using tower field representations and Boolean Satisfiability (SAT) solvers. Our research makes several significant contributions to the field. Firstly, we have optimized the GF() inversion, achieving a remarkable 31.35% area reduction (15.33 GE) compared to the best known implementations. Secondly, we have enhanced multiplication implementations for transformation matrices using a SAT-method based on local solutions. This approach has yielded notable improvements, such as a 22.22% reduction in More >

Mouna Bedoui^1,*, Belgacem Bouallegue^1,2, Abdelmoty M. Ahmed², Belgacem Hamdi^1,3, Mohsen Machhout¹, Mahmoud¹, M. Khattab²

Computer Systems Science and Engineering, Vol.44, No.3, pp. 2177-2193, 2023, DOI:10.32604/csse.2023.026516 - 01 August 2022

Abstract Since the end of the 1990s, cryptosystems implemented on smart cards have had to deal with two main categories of attacks: side-channel attacks and fault injection attacks. Countermeasures have been developed and validated against these two types of attacks, taking into account a well-defined attacker model. This work focuses on small vulnerabilities and countermeasures related to the Elliptic Curve Digital Signature Algorithm (ECDSA) algorithm. The work done in this paper focuses on protecting the ECDSA algorithm against fault-injection attacks. More precisely, we are interested in the countermeasures of scalar multiplication in the body of the… More >

Hassen Mestiri^1,2,3,*, Imen Barraj^4,5, Abdullah Alsir Mohamed¹, Mohsen Machhout³

CMC-Computers, Materials & Continua, Vol.70, No.2, pp. 3667-3683, 2022, DOI:10.32604/cmc.2022.020716 - 27 September 2021

Abstract The Advanced Encryption Standard cryptographic algorithm, named AES, is implemented in cryptographic circuits to ensure high security level to any system which required confidentiality and secure information exchange. One of the most effective physical attacks against the hardware implementation of AES is fault attacks which can extract secret data. Until now, a several AES fault detection schemes against fault injection attacks have been proposed. In this paper, so as to ensure a high level of security against fault injection attacks, a new efficient fault detection scheme based on the AES architecture modification has been proposed.… More >