S. Rooban1, Moru Leela1, Md. Zia Ur Rahman1,*, N. Subbulakshmi2, R. Manimegalai3
CMC-Computers, Materials & Continua, Vol.72, No.1, pp. 1309-1321, 2022, DOI:10.32604/cmc.2022.023934
Abstract Considerable research has considered the design of low-power and high-speed devices. Designing integrated circuits with low-power consumption is an important issue due to the rapid growth of high-speed devices. Embedded static random-access memory (SRAM) units are necessary components in fast mobile computing. Traditional SRAM cells are more energy-consuming and with lower performances. The major constraints in SRAM cells are their reliability and low power. The objectives of the proposed method are to provide a high read stability, low energy consumption, and better writing abilities. A transmission gate-based multi-threshold single-ended Schmitt trigger (ST) 9T SRAM cell in a bit-interleaving structure without… More >
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