Anwer Mustafa Hilal^1,*, Jaber S. Alzahrani², Dalia H. Elkamchouchi³, Majdy M. Eltahir⁴, Ahmed S. Almasoud⁵, Abdelwahed Motwakel¹, Abu Sarwar Zamani¹, Ishfaq Yaseen¹

Computer Systems Science and Engineering, Vol.45, No.1, pp. 955-969, 2023, DOI:10.32604/csse.2023.030132

Abstract Recently, unmanned aerial vehicles (UAV) or drones are widely employed for several application areas such as surveillance, disaster management, etc. Since UAVs are limited to energy, efficient coordination between them becomes essential to optimally utilize the resources and effective communication among them and base station (BS). Therefore, clustering can be employed as an effective way of accomplishing smart communication systems among multiple UAVs. In this aspect, this paper presents a group teaching optimization algorithm with deep learning enabled smart communication system (GTOADL-SCS) technique for UAV networks. The proposed GTOADL-SCS model encompasses a two stage process namely clustering and classification. At… More >

Arpit Jain^1,*, Adesh Kumar², Anand Prakash Shukla³, Hammam Alshazly⁴, Hela Elmannai⁵, Abeer D. Algarni⁵, Roushan Kumar⁶, Jitendra Yadav⁶

Intelligent Automation & Soft Computing, Vol.34, No.3, pp. 2007-2021, 2022, DOI:10.32604/iasc.2022.024770

Abstract Network on chip (NoC) is an integrated communication system on chip (SoC), efficiently connecting various intellectual property (IP) modules on a single die. NoC has been suggested as an enormously scalable solution to overcome the communication problems in SoC. The performance of NoC depends on several aspects in terms of area, latency, throughput, and power. In this paper, the 2D and 3D mesh NoC performance on Virtex-5 field-programmable gate array (FPGA) is studied. The design is carried in Xilinx ISE 14.7 and the behavior model is followed based on XY and XYZ routing for 2D and 3D mesh NoC respectively.… More >