Heng-Cheng Lin1, Chieh Kung2, Rong-Sheng Chen1, Gin-Tiao Liang1
CMC-Computers, Materials & Continua, Vol.3, No.2, pp. 55-64, 2006, DOI:10.3970/cmc.2006.003.055
Abstract Wafer level chip scale package (WLCSP) has been recognized providing clear advantages over traditional wire-bond package in relaxing the need of underfill while offering high density of I/O interconnects. Without the underfill, the solder joint reliability becomes more critical. Adding to the reliability concerns is the safety demand trend toward "green'' products on which unleaded material, e.g. lead-free solders, is required. The requirement of lead-free solders on the packages results in a higher reflow temperature profile in the package manufacturing process, in turn, complicating the reliability issue. This paper presents an optimization study, considering the fatigue reliability, for a wafer… More >
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